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MCP6N16-001E/MF 查看數據表(PDF) - Microchip Technology

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MCP6N16-001E/MF
Microchip
Microchip Technology Microchip
MCP6N16-001E/MF Datasheet PDF : 58 Pages
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MCP6N16
In this data sheet, RF + RG = 10 kfor most gains (0
for GDM = 1); see Table 1-6. This choice gives good
phase margin. In general, RF (Figure 4-13) needs to
meet the following limits to maintain stability:
EQUATION 4-13:
For GDM = 1:
RF = 0
For GDM > 1:
RF 2-------f--G---G-B---WD2----M-P---C----G--
Where:
  0.25
GDM GMIN
fGBWP = Gain-Bandwidth Product
CG = CDM + CCM + (PCB stray capacitance)
4.4.10 EMI REJECTION RATIO (EMIRR)
Electromagnetic interference (EMI) can be coupled to
an INA through electromagnetic induction or radiation,
or by conduction. INAs are most sensitive to EMI at
their input pins.
EMIRR describes an INA’s EMI robustness. Internal
passive filters in these parts improve the EMIRR, when
good PCB layout techniques are used. EMIRR is
defined to be:
EQUATION 4-14:
Where:
EMIRRdB
=
20
log
---V--V-R---O-F--S-
VRF = Peak Input Voltage of EMI (VPK)
VOS = Input Offset Voltage Shift (V)
4.4.11
REDUCING UNDESIRED NOISE
AND SIGNALS
Reduce undesired noise and signals with:
• Low bandwidth signal filters:
- Minimizes random analog noise
- Reduces interfering signals
• Good PCB layout techniques:
- Minimizes crosstalk
- Minimizes parasitic capacitances and
inductances that interact with fast switching
edges
• Good power supply design:
- Isolation from other parts
- Filtering of interference on supply line(s)
4.4.12 SUPPLY BYPASS
With these INAs, the Power Supply pin (VDD for single
supply) should have a local bypass capacitor (i.e.,
0.01 µF to 0.1 µF) within 2 mm for good high-frequency
performance. Surface mount, multilayer ceramic
capacitors, or their equivalent, should be used.
These INAs require a bulk capacitor (i.e., 1.0 µF or
larger) within 100 mm to provide large, slow currents.
This bulk capacitor can be shared with other nearby
analog parts as long as crosstalk through the supplies
does not prove to be a problem.
4.4.13 PCB DESIGN FOR DC PRECISION
In order to achieve DC precision on the order of ±1 µV,
many physical errors need to be minimized. The design
of the printed circuit board (PCB), the wiring, and the
thermal environment have a strong impact on the
precision achieved. A poor PCB design can easily be
more than 100 times worse than the MCP6N16 op
amps’ minimum and maximum specifications.
4.4.13.1 PCB Layout
Any time two dissimilar metals are joined together, a
temperature dependent voltage appears across the
junction (the Seebeck or thermojunction effect). This
effect is used in thermocouples to measure
temperature. The following are examples of
thermojunctions on a PCB:
• Components (resistors, INAs, …) soldered to a
copper pad
• Wires mechanically attached to the PCB
• Jumpers
• Solder joints
• PCB vias
Typical thermojunctions have temperature to voltage
conversion coefficients of 1 to 100 µV/°C (sometimes
higher).
Microchip’s AN1258 (“Op Amp Precision Design: PCB
Layout Techniques” – DS01258) contains in-depth
information on PCB layout techniques that minimize
thermojunction effects. It also discusses other effects,
such as crosstalk, impedances, mechanical stresses
and humidity.
4.4.13.2 Crosstalk
DC crosstalk causes offsets that appear as a larger
input offset voltage. Common causes include:
• Common mode noise (remote sensors)
• Ground loops (current return paths)
• Power supply coupling
Interference from the mains (usually 50 Hz or 60 Hz),
and other AC sources, can also affect the DC
performance. Nonlinear distortion can convert these
signals to multiple tones, including a DC shift in voltage.
DS20005318A-page 44
2014 Microchip Technology Inc.

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