AD10265AZ 查看數據表（PDF） - Analog Devices

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AD10265AZ

Dual Channel, 12-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning

Analog Devices 

AD10265

N

N+1

N+2

N+3

N+4

N+5

AIN

ENCODE

DIGITAL

OUTPUTS

tA

tOD

N–2

N–1

N

N+1

N+2

Figure 1. Timing Diagram

TTL CLOCK

f 10MHz

ENC

D11

ENC

D10

D9

D8

AINA3

1/2

AD10265

D7

D6

AINA2

SHOWN

D5

D4

AINA1

D3

D2

D1

D0

NOTE: ALL ؎5V SUPPLY PINS BYPASSED

TO GND WITH A 0.1␮F CAPACITOR

Figure 2. Equivalent Burn-In Circuit

OBSOLETE EQUIVALENT CIRCUITS

AINA3

AINA2

AINA1

R4

200⍀

R3

100⍀

Figure 3. Analog Input Stage

AVCC

DVCC

CURRENT

MIRROR

VREF

DVCC

D0 – D11

AVCC

R1

17k⍀

ENCODE

R2

8k⍀

TIMING

CIRCUITS

AVCC

R1

17k⍀

R2

8k⍀

ENCODE

CURRENT

MIRROR

Figure 4. Encode Inputs

Figure 5. Digital Output Stage

REV. A

–7–

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