AD9735-DPG2-EBZ 查看數據表（PDF） - Analog Devices
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AD9735-DPG2-EBZ Datasheet PDF : 72 Pages
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AD9734/AD9735/AD9736
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
DC Specifications ......................................................................... 4
Digital Specifications ................................................................... 6
AC Specifications.......................................................................... 8
Absolute Maximum Ratings............................................................ 9
Thermal Resistance ...................................................................... 9
Pin Configurations and Function Descriptions ......................... 10
Location of Supply and Control Pins....................................... 16
Terminology .................................................................................... 17
Typical Performance Characteristics ........................................... 18
AD9736 Static Linearity, 10 mA Full Scale ............................. 18
AD9736 Static Linearity, 20 mA Full Scale ............................. 19
AD9736 Static Linearity, 30 mA Full Scale ............................. 20
AD9735 Static Linearity, 10 mA, 20 mA, 30 mA
Full Scale ...................................................................................... 21
AD9734 Static Linearity, 10 mA, 20 mA, 30 mA
Full Scale ...................................................................................... 22
Built-In Self Test Control (BIST_CNT) Registers (Reg. 17,
Reg. 18, Reg. 19, Reg. 20, Reg. 21) ........................................... 33
Controller Clock Predivider (CCLK_DIV) Reading Register
(Reg. 22)....................................................................................... 34
Theory of Operation ...................................................................... 35
Serial Peripheral Interface ............................................................. 36
General Operation of the Serial Interface ............................... 36
Short Instruction Mode (8-Bit Instruction) ........................... 36
Long Instruction Mode (16-Bit Instruction).......................... 36
Serial Interface Port Pin Descriptions ..................................... 36
SCLK—Serial Clock............................................................... 36
CSB—Chip Select................................................................... 37
SDIO—Serial Data I/O.......................................................... 37
SDO—Serial Data Out .......................................................... 37
MSB/LSB Transfers .................................................................... 37
Notes on Serial Port Operation ................................................ 37
Pin Mode Operation .................................................................. 38
RESET Operation ....................................................................... 38
Programming Sequence ............................................................ 38
Interpolation Filter ..................................................................... 39
Data Interface Controllers......................................................... 39
LVDS Sample Logic.................................................................... 40
LVDS Sample Logic Calibration............................................... 40
AD9736 Power Consumption, 20 mA Full Scale....................... 23
AD9736 Dynamic Performance, 20 mA Full Scale................ 24
AD9735, AD9734 Dynamic Performance, 20 mA
Full Scale ...................................................................................... 27
AD973x WCDMA ACLR, 20 mA Full Scale .......................... 28
SPI Register Map............................................................................. 29
SPI Register Details ........................................................................ 30
Mode Register (Reg. 0) .............................................................. 30
Interrupt Request Register (IRQ) (Reg. 1) .............................. 30
Full Scale Current (FSC) Registers (Reg. 2, Reg. 3) ............... 31
LVDS Controller (LVDS_CNT) Registers (Reg. 4, Reg. 5,
Reg. 6) .......................................................................................... 31
Operating the LVDS Controller in Manual Mode via the
SPI Port ........................................................................................ 41
Operating the LVDS Controller in Surveillance and Auto
Mode ............................................................................................ 41
SYNC Logic and Controller .......................................................... 42
SYNC Logic and Controller Operation................................... 42
Operation in Manual Mode ...................................................... 42
Operation in Surveillance and Auto Modes ........................... 42
FIFO Bypass ................................................................................ 42
Digital Built-In Self Test (BIST) ................................................... 44
Overview ..................................................................................... 44
AD973x BIST Procedure ........................................................... 45
SYNC Controller (SYNC_CNT) Registers (Reg. 7,
Reg. 8) .......................................................................................... 32
Cross Controller (CROS_CNT) Registers (Reg. 10,
Reg. 11) ........................................................................................ 32
Analog Control (ANA_CNT) Registers (Reg. 14,
Reg. 15) ........................................................................................ 33
AD973x Expected BIST Signatures.......................................... 45
Generating Expected Signatures .............................................. 46
Cross Controller Registers............................................................. 47
Analog Control Registers .............................................................. 48
Band Gap Temperature Characteristic Trim Bits................... 48
Mirror Roll-Off Frequency Control ........................................ 48
Rev. B | Page 2 of 72
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