MC100LVEL29(2016) 查看數據表（PDF） - ON Semiconductor
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MC100LVEL29
(Rev.:2016)
(Rev.:2016)
ON Semiconductor
MC100LVEL29 Datasheet PDF : 6 Pages
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MC100LVEL29
R0 VCC Q0 Q0 S0 S1 VCC Q1 Q1 VEE
20 19 18 17 16 15 14 13 12 11
Q
Q
R
S
D
CLK
Q
Q
S
R
D
CLK
1 2 3 4 5 6 7 8 9 10
D0 D0 CLK0 CLK0 VBB D1 D1 CLK1 CLK1 R1
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D0, D0; D1, D1
R0, R1
CLK0, CLK0
CLK1, CLK1
S0, S1
Q0, Q0; Q1, Q1
VBB
VCC
VEE
ECL Differential Data Inputs
ECL Reset Inputs
ECL Differential Clock Inputs
ECL Differential Clock Inputs
ECL Set Inputs
ECL Differential Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
Table 2. TRUTH TABLE
R
S
D CLK
L
L
L
Z
L
L
H
Z
H
L
X
X
L
H
X
X
H
H
X
X
Q
L
H
L
H
Undef
Q
H
L
H
L
Undef
Z = LOW to HIGH Transition
X = Don’t Care
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC PECL Mode Power Supply
VEE
NECL Mode Power Supply
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
VEE = 0 V
VCC = 0 V
VI ≤ VCC
VI ≥ VEE
8 to 0
V
−8 to 0
V
6 to 0
V
−6 to 0
Iout
Output Current
Continuous
Surge
50
mA
100
IBB
VBB Sink/Source
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC−20 WB
SOIC−20 WB
±0.5
−40 to +85
−65 to +150
90
60
mA
°C
°C
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Tsol
Wave Solder (Pb-Free)
Standard Board
< 2 to 3 sec @ 260°C
SOIC−20 WB
30 to 35
265
°C/W
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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