74LV174D 查看數據表（PDF） - NXP Semiconductors.

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74LV174D

Hex D-type flip-flop with reset; positive-edge trigger

NXP Semiconductors. 

Philips Semiconductors

Hex D-type flip-flop with reset; positive edge-trigger

Product specification

74LV174

AC WAVEFORMS (Continued)

VM = 1.5V at VCC w 2.7V v 3.6V

VM = 0.5V * VCC at VCC t 2.7V and w 4.5V

VOL and VOH are the typical output voltage drop that occur with the

output load.

Vl

CP INPUT

VM

GND

tsu

tsu

Vl

ÌÌÌÌ Dn INPUT

VM

ÌÌÌÌÌÌÌÌ GND

ÌÌÌth ÌÌÌÌÌÌÌÌÌÌÌÌ

ÌÌÌth ÌÌÌ

VOH

Qn OUTPUT

VM

VOL

SV00353

Figure 3. Data set-up and hold times for the data input (Dn).

NOTE:

The shaded areas indicate when the input is permitted to change for

predictable output performance.

TEST CIRCUIT

Vcc

PULSE

GENERATOR

Vl

RT

D.U.T.

VO

50pF

CL

RL= 1k

Test Circuit for Outputs

DEFINITIONS

RL = Load resistor

CL = Load capacitance includes jig and probe capacitiance

RT = Termination resistance should be equal to ZOUT of pulse generators.

TEST

tPLH/tPHL

VCC

< 2.7V

2.7–3.6V

≥ 4.5 V

VI

VCC

2.7V

VCC

SV00902

Figure 4. Load circuitry for switching times

1998 May 20

8

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