ADA4304-4ACPZ-R2(Rev0) 查看數據表（PDF） - Analog Devices
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ADA4304-4ACPZ-R2 Datasheet PDF : 12 Pages
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ADA4304-3/ADA4304-4
APPLICATIONS
The ADA4304-3/ADA4304-4 active splitters are primarily
intended for use in the downstream path of television set-top
boxes (STBs) that contain multiple tuners. They are typically
located directly after the diplexer in a bidirectional CATV
customer premise unit. The ADA4304-3/ADA4304-4 provide a
single-ended input and three or four single-ended outputs that
allow the delivery of the RF signal to multiple signal paths. These
paths can include, but are not limited to, a main picture tuner,
the picture-in-picture (PIP) tuner, an out-of-band (OOB) tuner,
a digital video recorder (DVR), and a cable modem (CM).
The ADA4304-3/ADA4304-4 exhibit composite second-order
(CSO) and composite triple beat (CTB) products that are −62 dBc
and −72 dBc, respectively. The use of the SiGe bipolar process
also allows the ADA4304-3/ADA4304-4 to achieve a noise figure
(NF) of 4.6 dB at 550 MHz.
CIRCUIT DESCRIPTION
The ADA4304-3/ADA4304-4 consist of a low noise buffer
amplifier followed by a resistive power divider. This arrangement
provides 3.3 dB (ADA4304-3) or 2.9 dB (ADA4304-4) of gain
relative to the RF signal present at the input of the device. The
input and each output must be properly matched to a 75 Ω
environment for distortion and noise performance to match
the data sheet specifications. AC coupling capacitors of 0.01 μF
are recommended for the input and outputs.
A 1 μH RF choke (Coilcraft chip inductor 0805LS-102X) is
required to correctly bias the internal nodes of the ADA4304-3/
ADA4304-4. It should be connected between the 5 V supply and
the IL pin (Pin 14). The choke should be placed as close as possible
to the ADA4304-3/ADA4304-4 to minimize parasitic capacitance
on the IL pin, which is critical for achieving the specified
bandwidth and flatness.
EVALUATION BOARDS
The ADA4304-3/ADA4304-4 evaluation board allows designers
to assess the performance of the parts in their particular
application. The board includes 75 Ω coaxial connectors and
75 Ω controlled-impedance signal traces that carry the input
and output signals. Power (5 V) is applied to the red VCC loop
connector, and ground is connected to the black GND loop
connector. Figure 21 is a schematic of the evaluation board. On
the ADA4304-3 evaluation board, connector VO4 and C7 are
not populated.
RF LAYOUT CONSIDERATIONS
Appropriate impedance matching techniques are mandatory
when designing circuit boards for the ADA4304-3/ADA4304-4.
Improper characteristic impedances on traces can cause reflections
that can lead to poor linearity. The characteristic impedance of
the signal trace to the input and from each output should be
75 Ω. Any ground metal on the top surface near signal lines
should be stitched with vias to the internal ground plane, as
shown in Figure 22. The device package exposed paddle must
be reflow soldered to a low inductance ground to achieve data
sheet performance specifications. This is achieved by connecting
the footprint ground pad with vias to a ground plane below
(see Figure 22).
POWER SUPPLY
The 5 V supply should be applied to each VCC pin and RF
choke via a low impedance power bus. The power bus should be
decoupled to ground using a 10 μF tantalum capacitor and a 0.1
μF ceramic chip capacitor located close to the ADA4304-3/
ADA4304-4. In addition, the VCC pins should be decoupled to
ground with a 0.1 μF ceramic chip capacitor located as close to
each pin as possible.
GND
VCC
C5 +
10µF
L1
1.0μH
C1
0.1µF C6
0.01μF
VO1
C8
0.1µF
C2
VIN
0.01μF
VCC
VOUT2
VCC ADA4304-3/ GND
ADA4304-4
GND
VOUT3
VIN
GND
C3
0.01μF
C4
0.01μF
VO2
VO3
C7
0.01μF
VO4
EXPOSED PAD
ADA4304-4 ONLY
Figure 21. Evaluation Board Schematic
Rev. 0 | Page 10 of 12
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