FAN5236MTC 查看數據表（PDF） - Fairchild Semiconductor
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FAN5236MTC Datasheet PDF : 20 Pages
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FAN5236
Pin Configurations
AGND
LDRV1
PGND1
SW1
HDRV1
BOOT1
ISNS1
EN1
FPWM1
VSEN1
ILIM1
SS1
DDR
VIN
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8 FAN5236 21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
LDRV2
PGND2
SW2
HDRV2
BOOT2
ISNS2
EN2
FPWM2
VSEN2
ILIM2/REF2
SS2
PG2/REF2OUT
PG1
QSOP-28 or TSSOP-28
θJA = 90°C/W
PRODUCT SPECIFICATION
Pin Definitions
Pin
Number Pin Name
1
AGND
2
LDRV1
27
LDRV2
3
PGND1
26
PGND2
4
SW1
25
SW2
5
HDRV1
24
6
BOOT1
23
BOOT2
7
ISNS1
22
ISNS2
8
EN1
21
EN2
9
FPWM1
20
FPWM2
10
VSEN1
19
VSEN2
11
ILIM1
12
SS1
17
SS2
13
DDR
Pin Function Description
Analog Ground. This is the signal ground reference for the IC. All voltage levels are
measured with respect to this pin.
Low-Side Drive. The low-side (lower) MOSFET driver output. Connect to gate of low-side
MOSFET.
Power Ground. The return for the low-side MOSFET driver. Connect to source of low-
side MOSFET.
Switching node. Return for the high-side MOSFET driver and a current sense input.
Connect to source of high-side MOSFET and low-side MOSFET drain.
High-Side Drive. High-side (upper) MOSFET driver output. Connect to gate of high-side
MOSFET.
BOOT. Positive supply for the upper MOSFET driver. Connect as shown in Figure 3.
Current Sense input. Monitors the voltage drop across the lower MOSFET or external
sense resistor for current feedback.
Enable. Enables operation when pulled to logic high. Toggling EN will also reset the
regulator after a latched fault condition. These are CMOS inputs whose state is
indeterminate if left open.
Forced PWM mode. When logic low, inhibits the regulator from entering hysteretic mode.
Otherwise tie to VOUT. The regulator uses VOUT on this pin to ensure a smooth
transition from Hysteretic mode to PWM mode. When VOUT is expected to exceed VCC,
tie to VCC.
Output Voltage Sense. The feedback from the outputs. Used for regulation as well as
PG, under-voltage and over-voltage protection and monitoring.
Current Limit 1. A resistor from this pin to GND sets the current limit.
Soft Start. A capacitor from this pin to GND programs the slew rate of the converter
during initialization. During initialization, this pin is charged with a 5µA current source.
DDR Mode Control. High = DDR mode. Low = 2 separate regulators operating 180° out
of phase.
REV. 1.1.9 7/12/04
3
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