CY8C4245PVI-473 查看數據表（PDF） - Cypress Semiconductor

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CY8C4245PVI-473

Programmable System-on-Chip (PSoC®)

Cypress Semiconductor 

PSoC® 4: PSoC 4100 Family

Datasheet

Programmable System-on-Chip (PSoC®)

General Description

PSoC® 4 is a scalable and reconfigurable platform architecture for a family of mixed-signal programmable embedded system

controllers with an ARM® Cortex™-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible

automatic routing. The PSoC 4100 product family, based on this platform, is a combination of a microcontroller with digital program-

mable logic, high-performance analog-to-digital conversion, opamps with Comparator mode, and standard communication and timing

peripherals. The PSoC 4100 products will be fully upward compatible with members of the PSoC 4 platform for new applications and

design needs. The programmable analog and digital sub-systems allow flexibility and in-field tuning of the design.

Features

32-bit MCU Sub-system

■ 24-MHz ARM Cortex-M0 CPU with single-cycle multiply

■ Up to 32 kB of flash with Read Accelerator

■ Up to 4 kB of SRAM

Programmable Analog

■ Two opamps with reconfigurable high-drive external and

high-bandwidth internal drive and Comparator modes and ADC

input buffering capability

■ 12-bit 806 ksps SAR ADC with differential and single-ended

modes and Channel Sequencer with signal averaging

■ Two current DACs (IDACs) for general-purpose or capacitive

sensing applications on any pin

■ Two low-power comparators that operate in Deep Sleep

Low Power 1.71-V to 5.5-V operation

■ 20-nA Stop Mode with GPIO pin wakeup

■ Hibernate and Deep Sleep modes allow wakeup-time versus

power trade-offs

Capacitive Sensing

■ Cypress CapSense Sigma-Delta (CSD) provides best-in-class

SNR (>5:1) and water tolerance

■ Cypress supplied software component makes capacitive

sensing design easy

■ Automatic hardware tuning (SmartSense™)

Segment LCD Drive

■ LCD drive supported on all pins (common or segment)

■ Operates in Deep Sleep mode with 4 bits per pin memory

Serial Communication

■ Two independent run-time reconfigurable serial communi-

cation blocks (SCBs) with reconfigurable I2C, SPI, or UART

functionality

Timing and Pulse-Width Modulation

■ Four 16-bit timer/counter pulse-width modulator (TCPWM)

blocks

■ Center-aligned, Edge, and Pseudo-random modes

■ Comparator-based triggering of Kill signals for motor drive and

other high reliability digital logic applications

Up to 36 Programmable GPIOs

■ Any GPIO pin can be CapSense, LCD, analog, or digital

■ Drive modes, strengths, and slew rates are programmable

Five different packages

■ 48-pin TQFP, 44-pin TQFP, 40-pin QFN, 35-ball WLCSP, and

28-pin SSOP package

■ 35-ball WLCSP package is shipped with I2C Bootloader in

Flash

Extended Industrial Temperature Operation

■ –40 °C to + 105 °C operation

PSoC Creator Design Environment

■ Integrated Development Environment provides schematic

design entry and build (with analog and digital automatic

routing)

■ Applications Programming Interface (API Component) for all

fixed-function and programmable peripherals

Industry Standard Tool Compatibility

■ After schematic entry, development can be done with

ARM-based industry-standard development tools

Cypress Semiconductor Corporation • 198 Champion Court

Document Number: 001-87220 Rev. *J

• San Jose, CA 95134-1709 • 408-943-2600

Revised July 10, 2017

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