74F50109 查看數據表（PDF） - Philips Electronics
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产品描述 (功能)
生产厂家
74F50109
Philips Electronics
74F50109 Datasheet PDF : 12 Pages
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Philips Semiconductors
Synchronizing dual J–K positive edge-triggered
flip-flop with metastable immune characteristics
Product specification
74F50109
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
TEST
CONDITION
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF,
RL = 500Ω
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500Ω
MIN TYP MAX
MIN
MAX
fmax
Maximum clock frequency
Waveform 1
130 150
90
tPLH
Propagation delay
tPHL
CPn to Qn or Qn
Waveform 1
2.0
3.8
6.0
2.0
3.8
6.0
2.0
2.0
6.5
6.5
tPLH
Propagation delay
tPHL
SDn, RDn to Qn or Qn
Waveform 2
3.5
5.5
8.0
3.5
5.5
8.0
3.0
3.0
8.5
8.5
tsk(o)
Output skew1, 2
Waveform 4
1.5
1.5
NOTES:
1. | tPN actual – tPM actual| for any output compared to any other output where N and M are either LH or HL.
2. Skew times are valid only under same test conditions (temperature, VCC, loading, etc.,).
UNIT
ns
ns
ns
ns
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
tsu (H)
tsu(L)
th (H)
th (L)
tw (H)
tw (L)
tw (L)
trec
Setup time, high or low
Jn, Kn to CPn
Hold time, high or low
Jn, Kn to CPn
CPn pulse width,
high or low
SDn or RDn pulse width, low
Recovery time
SDn or RDn to CP
TEST
CONDITION
Waveform 1
Waveform 1
Waveform 1
Waveform 2
Waveform 3
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF,
RL = 500Ω
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF,
RL = 500Ω
MIN TYP MAX
MIN
MAX
1.5
2.0
1.5
2.0
1.0
1.5
1.0
1.5
3.0
3.5
4.0
5.0
3.5
4.0
3.0
3.5
UNIT
ns
ns
ns
ns
ns
September 14, 1990
7
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