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SN74LS293DR2 查看數據表(PDF) - ON Semiconductor

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SN74LS293DR2
ON-Semiconductor
ON Semiconductor ON-Semiconductor
SN74LS293DR2 Datasheet PDF : 5 Pages
1 2 3 4 5
SN54/74LS290 D SN54/74LS293
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, CL = 15 pF)
Limits
LS290
LS293
Symbol
Parameter
Min Typ Max Min Typ Max
fMAX
CP0 Input Clock Frequency
32
32
fMAX
CP1 Input Clock Frequency
16
16
tPLH
tPHL
Propagation Delay,
CP0 Input to Q0 Output
10
16
12
18
10
16
12
18
tPLH
tPHL
CP0 Input to Q3 Output
32
48
34
50
46
70
46
70
tPLH
tPHL
CP1 Input to Q1 Output
10
16
14
21
10
16
14
21
tPLH
tPHL
CP1 Input to Q2 Output
21
32
23
35
21
32
23
35
tPLH
tPHL
CP1 Input to Q3 Output
21
32
23
35
34
51
34
51
tPHL
MS Input to Q0 and Q3 Outputs
20
30
tPHL
MS Input to Q1 and Q2 Outputs
26
40
tPHL
MR Input to Any Output
26
40
26
40
Unit
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Limits
LS290
LS293
Symbol
Parameter
Min Max Min Max
Unit
tW
CP0 Pulse Width
15
15
ns
tW
CP1 Pulse Width
30
30
ns
tW
MS Pulse Width
15
ns
tW
MR Pulse Width
15
15
ns
trec
Recovery Time MR to CP
25
25
ns
RECOVERY TIME (trec) is defined as the minimum time required between the end of the reset pulse and the clock transition form HIGH-to-LOW in order to
recognize and transfer HIGH data to the Q outputs.
AC WAVEFORMS
*CP 1.3 V
tPHL
Q
1.3 V
1.3 V
tW
tPLH
1.3 V
Figure 1
*The number of Clock Pulses required between the tPHL and tPLH measurements can be determined from the appropriate Truth Tables.
MR & MS
1.3 V
CP
tPHL
Q
1.3 V
tW
trec
1.3 V
1.3 V
MS 1.3 V
CP
Q0 Q3 tPLH
(LS290)
1.3 V
tW
trec
1.3 V
1.3 V
Figure 2
Figure 3
FAST AND LS TTL DATA
5-5

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