74LV259 查看數據表（PDF） - NXP Semiconductors.

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74LV259

8-bit addressable latch

NXP Semiconductors. 

NXP Semiconductors

11. Waveforms

74LV259

8-bit addressable latch

VCC

D input

GND

VCC

LE input

GND

VOH

Qn output

VOL

VM

tW

tPHL

VM

tPLH

001aah121

Measurement points are given in Table 9.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 6. The enable input (LE) to output (Qn) propagation delays and the enable input pulse width

VCC

An input

GND

VOH

Qn output

VOL

VM

tPHL

VM

tPLH

001aah122

Measurement points are given in Table 9.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 7. The address input (An) to output (Qn) propagation delays

VCC

D input

GND

VOH

Qn output

VOL

VM

tPHL

VM

tPLH

001aah123

Measurement points are given in Table 9.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 8. The data input (D) to output (Qn) propagation delays

74LV259_3

Product data sheet

Rev. 03 — 2 January 2008

© NXP B.V. 2008. All rights reserved.

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