8255A-5 查看數據表（PDF） - Intel

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8255A-5

CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

Intel 

82C55A

231256 –7

Figure 7 Bit Set Reset Format

Interrupt Control Functions

When the 82C55A is programmed to operate in

mode 1 or mode 2 control signals are provided that

can be used as interrupt request inputs to the CPU

The interrupt request signals generated from port C

can be inhibited or enabled by setting or resetting

the associated INTE flip-flop using the bit set reset

function of port C

This function allows the Programmer to disallow or

allow a specific I O device to interrupt the CPU with-

out affecting any other device in the interrupt struc-

ture

INTE flip-flop definition

(BIT-SET) INTE is SET Interrupt enable

(BIT-RESET) INTE is RESET Interrupt disable

Note

All Mask flip-flops are automatically reset during

mode selection and device Reset

6

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