A617308 查看數據表（PDF） - AMIC Technology

零件编号

产品描述 (功能)

生产厂家

A617308

128K X 8 BIT HIGH SPEED CMOS SRAM

AMIC Technology 

AC Test Conditions

Input Pulse Levels

Input Rise and Fall Time

Input and Output Timing Reference Levels

Output Load

A617308 Series

0V to 3.0V

2 ns

1.5V

See Figures 1 and 2

DATAOUT

30pF

5V

480Ω

255Ω

DATAOUT

5pF*

5V

480Ω

255Ω

Figure 1. Output Load

Data Retention Characteristics (TA = 0°C to 70°C)

Symbol

Parameter

Min.

VDR VCC for Data Retention

3

ICCDR Data Retention Current

-

Chip Disable to Data Retention

tCDR

Time

tR

Operation Recovery Time

tRC = Read Cycle Time

0

TRC*

* Including scope and jig.

Figure 2. Output Load for tCLZ, tOLZ,

tCHZ, tOHZ, tWHZ, and tOW

Max.

5.5

1

-

-

Unit

Conditions

V

CE1 ≥ VCC - 0.2V

VCC = 3.0V

mA

CE1 ≥ VCC - 0.2V

CE2 ≤ 0.2V

VIN ≥ VCC - 0.2V or

VIN ≤ 0.2V

ns

See Retention Waveform

ms

PRELIMINARY (January, 2000, Version 0.2)

9

AMIC Technology, Inc.

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