A64E06161(2004) 查看數據表（PDF） - AMIC Technology

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A64E06161
(Rev.:2004)

1M X 16 Bit Low Voltage Super RAM

AMIC Technology 

CR Register Update – Timing Waveform

A64E06161

Address

CE

WE

ZZ

tWC

Eight Lower-order address bits (A7-A0) Define PAR Register

tCW

tZZCE

tAW

tWR

tAS

tWP

tZZWE

tZZMIN

Figure 1: CR register update–Timing waveform

Notes:

1. VIH(MAX) = VCCQ + 0.2V for pulse durations less than 20ns.

2. VIL(MIN) = -1V for pulse duration less than 20ns.

3. Overshoot and undershoot specifications are characterized and are not 100% tested.

4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC =

VCC(typ.) and TA = 25°C.

5. The timing values for the CR Register Update are shown in the “Partial Array Mode Timing” table and “AC Characteristics”

table.

PRELIMINARY (November, 2004, Version 0.1)

7

AMIC Technology, Corp.

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