AD7751 查看數據表（PDF） - Analog Devices

零件编号

产品描述 (功能)

生产厂家

AD7751

Energy Metering IC With On-Chip Fault Detection

Analog Devices 

AD7751

ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C unless otherwise noted)

AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

DVDD to AVDD . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V

Analog Input Voltage to AGND

V1A, V1B, V1N, V2P, and V2N . . . . . . . . . . –6 V to +6 V

Reference Input Voltage to AGND . . –0.3 V to AVDD + 0.3 V

Digital Input Voltage to DGND . . . . –0.3 V to DVDD + 0.3 V

Digital Output Voltage to DGND . . . –0.3 V to DVDD + 0.3 V

Operating Temperature Range

Industrial (A, B Versions) . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

24-Lead Plastic DIP, Power Dissipation . . . . . . . . . . 450 mW

θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105°C/W

Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . 260°C

24-Lead SSOP, Power Dissipation . . . . . . . . . . . . . . 450 mW

θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 112°C/W

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those listed in the operational sections

of this specification is not implied. Exposure to absolute maximum rating condi-

tions for extended periods may affect device reliability.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although

the AD7751 features proprietary ESD protection circuitry, permanent damage may occur on

devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are

recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

TERMINOLOGY

MEASUREMENT ERROR

The error associated with the energy measurement made by the

AD7751 is defined by the following formula:

Percentage Error =

Energy Registered by the AD7751 – True Energy × 100%

True Energy

PHASE ERROR BETWEEN CHANNELS

The HPF (High-Pass Filter) in Channel 1 has a phase lead

response. To offset this phase response and equalize the phase

response between channels a phase correction network is also

placed in Channel 1. The phase correction network matches the

phase to within ± 0.1° over a range of 45 Hz to 65 Hz and ± 0.2°

over a range 40 Hz to 1 kHz (see Figures 10 and 11).

ADC OFFSET ERROR

This refers to the dc offset associated with the analog inputs to

the ADCs. It means that with the analog inputs connected to

AGND the ADCs still see an analog input signal of 1 mV to

10 mV. However, when the HPF is switched on the offset is

removed from the current channel and the power calculation is

not affected by this offset.

POWER SUPPLY REJECTION

This quantifies the AD7751 measurement error as a percentage

of reading when the power supplies are varied.

For the ac PSR measurement a reading at nominal supplies

(5 V) is taken. A 200 mV rms/100 Hz signal is then introduced

onto the supplies and a second reading obtained under the same

input signal levels. Any error introduced is expressed as a per-

centage of reading—see Measurement Error definition.

For the dc PSR measurement a reading at nominal supplies

(5 V) is taken. The supplies are then varied ± 5% and a second

reading is obtained with the same input signal levels. Any error

introduced is again expressed as a percentage of reading.

GAIN ERROR

The gain error of the AD7751 is defined as the difference between

the measured output frequency (minus the offset) and the ideal

output frequency. It is measured with a gain of 1 in Channel

V1A. The difference is expressed as a percentage of the ideal

frequency. The ideal frequency is obtained from the transfer

function—see Transfer Function section.

GAIN ERROR MATCH

The gain error match is defined as the gain error (minus the

offset) obtained when switching between a gain of 1 and a gain

of 2, 8, or 16. It is expressed as a percentage of the output

frequency obtained under a gain of 1. This gives the gain

error observed when the gain selection is changed from

1 to 2, 8, or 16.

–4–

REV. A

Share Link: