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AD71056ARZ-RL 查看數據表(PDF) - Analog Devices

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AD71056ARZ-RL Datasheet PDF : 20 Pages
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AD71056
Parameter
POWER SUPPLY
VDD
IDD
Value
4.75
5.25
5
Unit
V min
V max
mA max
Test Conditions/Comments
For specified performance
5 V − 5%
5 V + 5%
Typically 4 mA
1 See the Terminology section for an explanation of specifications.
2 See plots in the Typical Performance Characteristics section.
3 See the Analog Inputs section.
4 Sample tested during initial release and after any redesign or process change that may affect this parameter.
TIMING CHARACTERISTICS
VDD = 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, TMIN to TMAX = −40°C to +85°C, unless
otherwise noted.
Sample tested during initial release and after any redesign or process change that may affect this parameter. See Figure 2.
Table 2.
Parameter
t1 1
t2
t3
t41, 2
t5
t6
Specifications
120
See Table 6
1/2 t2
90
See Table 7
2
Unit
Test Conditions/Comments
ms
F1 and F2 pulse width (logic low).
sec
Output pulse period. See the Transfer Function section.
sec
Time between F1 falling edge and F2 falling edge.
ms
CF pulse width (logic high).
sec
CF pulse period. See the Transfer Function section.
μs
Minimum time between F1 and F2 pulses.
1 The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Frequency Outputs section.
2 The CF pulse is always 35 μs in high frequency mode. See the Frequency Outputs section and Table 7.
Timing Diagram
t1
F1
t6
t2
F2
t3
t4
t5
CF
Figure 2. Timing Diagram for Frequency Outputs
Rev. A | Page 4 of 20

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