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AD71056AR-RL 查看數據表(PDF) - Analog Devices

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AD71056AR-RL Datasheet PDF : 20 Pages
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AD71056
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VDD 1
V2P 2
16 F1
15 F2
V2N 3 AD71056 14 CF
V1N 4 TOP VIEW 13 DGND
V1P 5 (Not to Scale) 12 REVP
AGND 6
11 RCLKIN
REFIN/OUT 7
SCF 8
10 S0
9 S1
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
VDD
Power Supply. This pin provides the supply voltage for the circuitry in the AD71056. Maintain the supply
voltage at 5 V ± 5% for specified operation. Decouple this pin with a 10 μF capacitor in parallel with a ceramic
100 nF capacitor.
2, 3
V2P, V2N
Analog Inputs for Channel V2 (Voltage Channel). These inputs provide a fully differential input pair. The
maximum differential input voltage is ±165 mV for specified operation. Both inputs have internal ESD
protection circuitry; an overvoltage of ±6 V can be sustained on these inputs without risk of permanent
damage.
4, 5
V1N, V1P
Analog Inputs for Channel V1 (Current Channel). These inputs are fully differential voltage inputs with a
maximum signal level of ±30 mV with respect to the V1N pin for specified operation. Both inputs have
internal ESD protection circuitry and, in addition, an overvoltage of ±6 V can be sustained on these inputs
without risk of permanent damage.
6
AGND
Analog Ground. This pin provides the ground reference for the analog circuitry in the AD71056, that is, the ADCs
and reference. Tie this pin to the analog ground plane of the PCB. The analog ground plane is the ground
reference for all analog circuitry, such as antialiasing filters, current and voltage sensors, and so forth. For
accurate noise suppression, connect the analog ground plane to the digital ground plane at only one point. A
star ground configuration helps to keep noisy digital currents away from the analog circuits.
7
REFIN/OUT
Reference Voltage. The on-chip reference has a nominal value of 2.45 V and a typical temperature coefficient
of 20 ppm/°C. An external reference source can also be connected at this pin. In either case, decouple this pin
to AGND with a 1 μF tantalum capacitor and a 100 nF ceramic capacitor. The internal reference cannot be
used to drive an external load.
8
SCF
Select Calibration Frequency. This logic input selects the frequency on the Calibration Output CF. Table 7
shows calibration frequency selections.
9, 10 S1, S0
Conversion Frequency Logic Input Selection. These logic inputs select one of four possible frequencies for the
digital-to-frequency conversion. With this logic input, designers have greater flexibility when designing an
energy meter. Table 5 shows conversion frequency selections.
11
RCLKIN
On-Chip Clock Enabler. To enable the internal oscillator as a clock source to the chip, a precise low
temperature drift resistor at a nominal value of 6.2 kΩ must be connected from this pin to DGND.
12
REVP
Negative Power Indicator. This logic output goes high when negative power is detected, such as when the
phase angle between the voltage and current signals is greater than 90°. This output is not latched and is
reset when positive power is once again detected. The output goes high or low at the same time that a pulse
is issued on CF.
13
DGND
Digital Ground. This pin provides the ground reference for the digital circuitry in the AD71056, that is, the
multiplier, filters, and digital-to-frequency converter. Tie this pin to the digital ground plane of the PCB. The
digital ground plane is the ground reference for all digital circuitry, for example, counters (mechanical and
digital), MCUs, and indicator LEDs. For accurate noise suppression, connect the analog ground plane to the
digital ground plane at one point only—a star ground.
14
CF
Calibration Frequency Logic Output. The CF logic output provides instantaneous real power information. This
output is for calibration purposes (also see the SCF pin description).
15, 16 F2, F1
Low Frequency Logic Outputs. F1 and F2 supply average real power information. The logic outputs can be
used to directly drive electromechanical counters and 2-phase stepper motors. See the Transfer Function
section.
Rev. A | Page 7 of 20

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