AD7866 查看數據表（PDF） - Analog Devices
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AD7866 Datasheet PDF : 25 Pages
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AD7866
Parameter
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time3
Throughput Rate
POWER REQUIREMENTS
VDD
VDRIVE
IDD7
Normal Mode (Static)
Operational, fS = 1 MSPS
Partial Power-Down Mode
A Version1 B Version1
16
16
300
300
1
1
2.7/5.25
2.7/5.25
3.1
2.8
4.8
3.8
1.6
2.7/5.25
2.7/5.25
3.1
2.8
4.8
3.8
1.6
Partial Power-Down Mode
560
560
Full Power-Down Mode
Power Dissipation7
Normal Mode (Operational)
Partial Power-Down (Static)
Full Power-Down (Static)
1
1
2
2
24
24
11.4
11.4
2.8
2.8
1.68
1.68
5
5
3
3
NOTES
1Temperature ranges as follows: A, B Versions: –40°C to +125°C.
2See Terminology section.
3Sample tested @ 25°C to ensure compliance.
4External reference range that may be applied at VREF, DCAPA, or DCAPB.
5Relates to pins VREF, DCAPA, or DCAPB.
6See Reference section for DCAPA, DCAPB output impedances.
7See Power vs. Throughput Rate section.
Specifications subject to change without notice.
Unit
Test Conditions/Comments
SCLK cycles 800 ns with SCLK = 20 MHz
ns max
MSPS max See Serial Interface Section
V min/max
V min/max
mA max
mA max
mA max
mA max
mA max
µA max
µA max
µA max
mW max
mW max
mW max
mW max
µW max
µW max
Digital I/Ps = 0 V or VDRIVE
VDD = 4.75 V to 5.25 V. Add 0.5 mA
Typical if Using Internal Reference.
VDD = 2.7 V to 3.6 V. Add 0.35 mA
Typical if Using Internal Reference.
VDD = 4.75 V to 5.25 V. Add 0.5 mA
Typical if Using Internal Reference.
VDD = 2.7 V to 3.6 V. Add 0.5 mA
Typical if Using Internal Reference.
fS = 100 kSPS, fSCLK = 20 MHz
Add 0.2 mA Typ if Using Internal
Reference.
(Static) Add 100 µA Typical if Using
Internal Reference.
SCLK On or Off. TA = –40ЊC to +85ЊC
SCLK On or Off. 85ЊC < TA ≤ 125ЊC
VDD = 5 V
VDD = 3 V
VDD = 5 V. SCLK On or Off.
VDD = 3 V. SCLK On or Off.
VDD = 5 V. SCLK On or Off.
VDD = 3 V. SCLK On or Off.
REV. A
–3–
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