ADG1408YRUZ-REEL(Rev0) 查看數據表（PDF） - Analog Devices
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ADG1408YRUZ-REEL Datasheet PDF : 20 Pages
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ADG1408/ADG1409
A0 1
EN 2
VSS 3
S1A 4
S2A 5
S3A 6
S4A 7
DA 8
16 A1
15 GND
ADG1409
TOP VIEW
(Not to Scale)
14 VDD
13 S1B
12 S2B
11 S3B
10 S4B
9 DB
Figure 4. ADG1409 Pin Configuration (TSSOP)
VSS 1
S1A 2
S2A 3
S3A 4
PIN 1
INDICATOR
ADG1409
TOP VIEW
(Not to Scale)
12 VDD
11 S1B
10 S2B
9 S3B
Figure 5. ADG1409 Pin Configuration (LFCSP_VQ),
Exposed Pad Tied to Substrate, VSS
Table 9. ADG1409 Pin Function Descriptions
Pin No.
TSSOP LFCSP_VQ Mnemonic Description
1
15
A0
Logic Control Input.
2
16
EN
Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3
1
VSS
Most Negative Power Supply Potential. In single supply applications, it can be connected
to ground.
4
2
S1A
Source Terminal 1A. Can be an input or an output.
5
3
S2A
Source Terminal 2A. Can be an input or an output.
6
4
S3A
Source Terminal 3A. Can be an input or an output.
7
5
S4A
Source Terminal 4A. Can be an input or an output.
8
6
DA
Drain Terminal A. Can be an input or an output.
9
7
DB
Drain Terminal B. Can be an input or an output.
10
8
S4B
Source Terminal 4B. Can be an input or an output.
11
9
S3B
Source Terminal 3B. Can be an input or an output.
12
10
S2B
Source Terminal 2B. Can be an input or an output.
13
11
S1B
Source Terminal 1B. Can be an input or an output.
14
12
VDD
Most Positive Power Supply Potential.
15
13
GND
Ground (0 V) Reference.
16
14
A1
Logic Control Input.
Table 10. ADG1409 Truth Table
A1
A0
EN
X
X
0
0
0
1
0
1
1
1
0
1
1
1
1
ON SWITCH PAIR
NONE
1
2
3
4
Rev. 0 | Page 11 of 20
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