ADUC814ARU(Rev0) 查看數據表（PDF） - Analog Devices
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ADUC814ARU
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
ADUC814ARU Datasheet PDF : 16 Pages
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Parameter
START-UP TIME (continued)
Oscillator Powered Down15
Wake-Up with SPI/I2C Interrupt
Wake-Up with TIC Interrupt
Wake-Up with External RESET
After External RESET in Normal Mode
After WDT Reset in Normal Mode
FLASH/EE MEMORY RELIABILITY
CHARACTERISTICS16
Endurance17
Data Retention18
POWER REQUIREMENTS19, 20
Power Supply Voltages
AVDD/DVDD – AGND
Power Supply Currents – Normal Mode
DVDD Current13
AVDD Current13
DVDD Current
AVDD Current
DVDD Current13
AVDD Current
Power Supply Currents – Idle Mode
DVDD Current13
AVDD Current13
DVDD Current13
AVDD Current13
DVDD Current13
AVDD Current13
Power Supply Currents – Power-Down Mode
VDD = 5 V
150
150
150
3
3
100,000
100
4.5
5.5
5
4
1.7
20
16
1.7
3.5
2.8
1.7
1.7
1.5
0.15
6
4
0.15
1.25
1.1
0.15
DVDD Current13
40
AVDD Current
1
DVDD Current
20
AVDD Current
1
Typical Additional Power Supply Currents
PSM Peripheral
50
ADC
1.5
DAC
150
VDD = 3 V
400
400
400
3
3
Unit
ms typ
ms typ
ms typ
ms typ
ms typ
ADuC814
Test Conditions
OSC_PD Bit = 1 in PLLCON
Controlled via WDCON
100,000
100
cycles min
years min
2.7
V min
AVDD/DVDD = 3 V Nominal
3.3
V max
V min
V max
AVDD/DVDD = 5 V Nominal
2.5
mA max Core CLK = 2.097 MHz
(CD Bits in PLLCON = 3)
2
mA typ
1.7
mA max
10
mA max Core CLK = 16.78 MHz (max)
8
mA typ (CD Bits in PLLCON = 0)
1.7
mA max
1.5
mA max Core CLK = 131.2 kHz (min)
1.2
mA typ (CD Bits in PLLCON = 7)
1.7
mA max
1.2
mA max Core CLK = 2.097 MHz
(CD Bits in PLLCON = 3)
1
mA typ
0.15
mA max
3
mA max Core CLK = 16.78 MHz (max)
2.5
mA typ (CD Bits in PLLCON = 0)
0.15
mA max
1
mA max Core CLK = 131 kHz (min)
0.7
mA typ (CD Bits in PLLCON = 7)
0.15
mA max
Core CLK = 2.097 MHz or
16.78 MHz
(CD Bits in PLLCON = 3 or 0)
20
µA max Oscillator ON
14
µA typ
1
µA typ
15
µA max Oscillator OFF
10
µA typ
1
µA typ
Core CLK = 2.097 MHz,
(CD Bits in PLLCON = 3)
µA typ
AVDD = DVDD = 5 V
mA typ
µA typ
REV. 0
–5–
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