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AS6C4008 查看數據表(PDF) - Alliance Semiconductor

零件编号
产品描述 (功能)
生产厂家
AS6C4008
Alliance
Alliance Semiconductor Alliance
AS6C4008 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
$8*867 2009
AS6C4008
512K X 8 BIT LOW POWER CMOS SRAM
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Address
Dout
tRC
tAA
Previous Data Valid
tOH
Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
Address
CE#
OE#
Dout
tRC
tAA
tACE
High-Z
tOE
tOLZ
tCLZ
tOH
tOHZ
tCHZ
Data Valid
High-Z
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low.
3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
AUG09 v1.4
Alliance Memory Inc
Page 5 of 14

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