AS8SLC512K32PEC 查看數據表（PDF） - Austin Semiconductor
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AS8SLC512K32PEC
Austin Semiconductor
AS8SLC512K32PEC Datasheet PDF : 7 Pages
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iPEM
16 Mb ASYNC SRAM
Austin Semiconductor, Inc. AS8SLC512K32PEC
AC CHARACTERISTICS READ CYCLE
Parameter
Symbol
JEDEC Alt.
Read Cycle Time
tAVAV
tRC
Address Access Time
tAVQV
tAA
Chip Enable Access
tELQV
tACS
Chip Enable to Output in Low Z
tELQX
tCLZ
Chip Disable to Output in High Z
tEHQZ
tCHZ
Output Hold from Address Change tAVQX tOH
Output Enable to Output Valid
tGLQV
tOE
Output Enable to Output in Low Z
tGLQX
tOLZ
Output Enable to Output in High Z
tGHQZ
tOHZ
12ns
Min Max
12
12
12
2
6
2
6
0
6
15ns
Min Max
15
15
15
2
7
2
7
0
7
20ns
Min Max
20
20
20
2
9
2
9
0
9
25ns
Min Max
25
25
25
2
9
2
9
0
9
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ CYCLE 1 - W\ HIGH, G\, E\ LOW
tAVAV
A
ADDRESS 1
ADDRESS 2
tAVQV
tAVQX
Q
DATA 1
DATA 2
READ CYCLE 2 - W\ HIGH
tAVAV
A
tAVQV
E#
tELQV
tELQX
G#
tGLQV
tGLQX
Q
tEHQZ
t GHQZ
AS8SLC512K32PEC
Rev. 0.0 07/08
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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