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ASM1232LP 查看數據表(PDF) - PulseCore Semiconductor

零件编号
产品描述 (功能)
生产厂家
ASM1232LP
PULSECORE
PulseCore Semiconductor PULSECORE
ASM1232LP Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
November 2006
rev 1.6
Pin Configuration
DIP/SO/MicroSO
PBRST 1
8 VCC
TD 2
TOL 3
ASM1232LP 7 ST
ASM1232LPS-2
ASM1232LPU 6 RESET
GND 4
5 RESET
ASM1232LP/LPS
SO
NC 1
16 NC
PBRST 2
NC 3
15 VCC
14 NC
TD 4 ASM1232LPS 13 ST
NC 5
12 NC
TOL 6
11 RESET
NC 7
10 NC
GND 8
9 RESET
Pin Description
Pin #
8-Pin Package
1
2
3
4
5
6
7
8
-
Pin #
16-Pin Package
2
4
6
8
9
11
13
15
1,3,5,7,
10,12,14,16
Pin
Name
Function
PBRST Debounced manual pushbutton RESET input.
TD
Watchdog time delay selection. (tTD = 150ms for TD = GND, tTD = 610ms
for TD=Open, and tTD = 1200ms for TD = VCC).
TOL
Selects 5% (TOL connected to GND) or 10% (TOL connected to VCC)
trip point tolerance.
GND Ground.
RESET
Active HIGH reset output. RESET is active:
1. If VCC falls below the reset voltage trip point.
2. If PBRST is LOW.
3. If ST is not strobed LOW before the timeout period set by TD expires.
4. During power-up.
RESET Active LOW reset output. (See RESET).
ST Strobe input.
VCC 5V power.
NC No internal connection.
5V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
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