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ASM1232LP 查看數據表(PDF) - PulseCore Semiconductor

零件编号
产品描述 (功能)
生产厂家
ASM1232LP
PULSECORE
PulseCore Semiconductor PULSECORE
ASM1232LP Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
November 2006
rev 1.6
ASM1232LP/LPS
When PBRST is held LOW for the minimum time tPB, both
resets become active and remain active for a minimum time
period of 250ms after PBRST returns HIGH.
The debounced input is guaranteed to recognize pulses
greater than 20ms. No external pull-up resistor is required,
since PBRST is pulled HIGH by an internal 40kresistor.
The PBRST can be driven from a TTL or CMOS logic line or
shorted to ground with a mechanical switch.
power-up after the supply voltage returns to an in-tolerance
condition, the reset signal remains active for 250ms
minimum, allowing the power supply and system
microprocessor to stabilize. ST pulses as short as 20ns can
be detected.
Valid
Strobe
Valid
Strobe
Invalid
Strobe
ST
tST
tRST
tTD (min)
tTD (max)
PBRST
tPB
tPDLY
VIL
VIH
RESET
Note: ST is ignored whenever a reset is active
Figure 5: Timing Diagram: Strobe Input
RESET
RESET
tRST
VOH
VOL
Timeouts periods of approximately 150ms, 610ms or
1,200ms are selected through the TD pin.
TD Voltage level
Watchdog Time-out Period
(ms)
Figure 3: Timing Diagram: Pushbutton Reset
5V
ASM1232LP/LPS
1
PBRST
2
TD
VCC 8
ST 7
3
TOL
6
RESET
4
5
GND RESET
I/O
µP
RESET
GND
Floating
VCC
Min
Nom
Max
62.5
150
250
250
610
1000
500
1200
2000
The watchdog timer can not be disabled. It must be strobed
with a high-to-low transition to avoid watchdog timeout and
reset.
Figure 4: Application Circuit: Pushbutton Reset
Watchdog Timer and ST Input
A watchdog timer stops and restarts a microprocessor that is
“hung-up”. The µP must toggle the ST input within a set
period (as selectable through TD input) to verify proper
software execution. If the ST is not toggled low within the
minimum timeout period, reset signals become active. In
5V
ASM1232 LP/LPS
1
PBRST
2
TD
VCC 8
ST 7
3
6
TOL RESET
4
GND
5
MREQ
10kµP
Decoder
RESET Address
Bus
Figure 6: Application Circuit: Watchdog Timer
5V µP Power Supply Monitor and Reset Circuit
4 of 10
Notice: The information in this document is subject to change without notice

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