AZ100EP16FE 查看數據表（PDF） - Arizona Microtek, Inc

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AZ100EP16FE

PECL/ECL High Speed VCSEL Driver with Variable Output Swing or Limiting Amplifier

Arizona Microtek, Inc 

Arizona Microtek, Inc.

ENGINEERING NOTES

AZ100EP16FE PECL/ECL High Speed VCSEL Driver with

Variable Output Swing or Limiting Amplifier

The operational range of the AZ100EP16FE control input, VCTRL, is from VREF (full swing) to VCC (small swing). For post

amplifier applications, maximum swing is achieved by leaving the VCTRL pin open or by tying it to the negative supply pin

(VEE). Simple control of the output swing can be obtained by a variable resistor between the VREF and VCC pins, with the

wiper driving VCTRL. A typical application circuit is shown in Figure 2.

The AZ100EP16FE also provides a VREF output which functions as a DC bias for input AC coupling to the device. The

VREF pin should be used only as a bias for the AZ100EP16FE as its current sink/source capability is limited. When used,

the VREF pin should be bypassed to ground via a 0.01µF capacitor.

The maximum DC output current should be kept below 16mA. Connecting each output (Q/Q¯ ) to VEE with a 180Ω resistor

is typically used. The load is then AC coupled from the output. DC and AC symmetrical loading of the Q/Q¯ outputs will

provide the best output wave shape.

Under open input conditions for D/D¯ , the Q/Q¯ outputs are not guaranteed.

NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.

5K

V CTRL 1

D2

D3

VREF 4

8 V CC

7Q

6

Q

180 180

5 VEE

- 3.3V

Figure 2 - AZ10/100EP16 Large Signal Performance

50

50

www.azmicrotek.com

+1-480-962-5881

3

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July 2013, Rev 2.1

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