ML6673CH 查看數據表（PDF） - Micro Linear Corporation

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ML6673CH

Fast Ethernet/FDDI TP-PMD Transceiver

Micro Linear Corporation 

ML6673

PIN CONFIGURATION

ML6673

32-Pin PCC (Q32)

RXOUT+

RVCCD

SD–

SD+

N/C

TGNDD

LPBK

TXOFF

N/C

4 3 2 1 32 31 30

5

29

6

28

7

27

8

26

9

25

10

24

11

23

12

22

13

21

14 15 16 17 18 19 20

RRSET1

RRSET2

N/C

N/C

RGND

N/C

N/C

TVCCA

TGNDA

ML6673

32-Pin TQFP (H32-7)

RRSET1

TPIN–

TPIN+

CMREF

N/C

N/C

RVCCA

RXOUT–

32 31 30 29 28 27 26 25

1

24

2

23

3

22

4

21

5

20

6

19

7

18

8

17

9 10 11 12 13 14 15 16

TPOUT–

TPOUT+

RTSET2

RTSET1

TVCCD

TXIN–

TXIN+

N/C

PIN DESCRIPTION

NAME

FUNCTION

TXIN+, TXIN–

TPOUT+,

TPOUT–

LPBK

TXOFF

RTSET1,

RTSET2

TVCCA,

TVCCD

These differential ECL100K compatible

inputs receive NRZI data from the PHY

for transmission.

Outputs from the NRZI-MLT3 state

machine drive these differential current

outputs. The transmitter filter/transformer

module connects the media to these pins.

This TTL input enables transmitter-

receiver loopback internally when

asserted low. When LPBK is asserted,

signal detect is asserted.

This TTL input forces the NRZI-MLT3

state machine to a high impedence state

when asserted low and shuts off transmit

bias current.

An external 1% resistor connected

between these pins controls the

transmitter output current amplitude.

IOUT = 64 x 1.25V/RTSET

Separate analog and digital transmitter

power supply pins help to isolate

sensitive circuitry from noise generating

digital functions. Both supplies are

nominally +5 volts.

NAME

FUNCTION

TGNDA,

TGNDD

SD+, SD–

TPIN+, TPIN–

RXOUT+,

RXOUT–

RRSET1,

RRSET2

CMREF

RVCCA,

RVCCD

RGND

Analog and digital transmitter grounds

provide separate return paths for clean

and noisy signals.

These differential ECL100K compatible

outputs indicate the presence of a data

signal with an amplitude exceeding a

preset threshold.

MLT-3 encoded data from the receiver

filter/transformer module enters the

receiver through these pins.

Differential ECL100K compatible outputs

provide NRZI encoded data to the PHY.

Internal time constants controlling the

equalizer’s transfer function are set by an

external resistor connected across these

pins.

This pin provides a DC common mode

reference point for the receiver inputs.

Analog and digital supply pins are

separated to isolate clean and noisy

circuit functions. Both supplies are

nominally +5 volts.

Receiver ground.

2

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