C8051F206 查看數據表（PDF） - Silicon Laboratories
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C8051F206 Datasheet PDF : 2 Pages
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C8051F206
25 MIPS, 8 kB Flash, 12-Bit ADC, 48-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
PARAMETER
CONDITIONS
GLOBAL CHARACTERISTICS
Digital Supply Voltage
Digital Supply Current
Clock = 25 MHz
with CPU active
Clock = 1 MHz
Digital Supply Current
(shutdown)
Clock = 32 kHz; VDD Monitor Enabled
Oscillator not running; VDD Monitor
Enabled
Oscillator not running; VDD Monitor
Disabled
Digital Supply RAM Data
Retention Voltage
CPU & DIGITAL I/O PORTS
Clock Frequency Range
Port Output High Voltage
Port Output Low Voltage
Input High Voltage
IOH = –3 mA, Port I/O push-pull
IOL = 8.5 mA
Input Low Voltage
SPI Bus Clock Frequency fCLK=MCU Clock; SPI Master Mode
A/D CONVERTER
Resolution
Integral Nonlinearity
Differential Nonlinearity Guaranteed Monotonic
Signal-to-Noise Plus
Distortion
Throughput Rate
Input Voltage Range
COMPARATORS
Supply Current
(each Comparator)
Response Time
| CP+ – CP- | = 100 mV
Input Voltage Range
Input Bias Current
Input Offset Voltage
MIN
2.7
DC
VDD – 0.7
0.7 x VDD
64
0
–0.25
–5
–10
TYP
MAX
UNITS
3.6
V
9
mA
0.4
mA
20
µA
10
µA
0.1
µA
1.5
V
12
±1
1.3
4
0.001
25
0.6
0.3 x VDD
fCLK/2
±2
±1
100
VREF
VDD + 0.25
+5
+10
MHz
V
V
V
V
MHz
bits
LSB
LSB
dB
ksps
V
µA
µs
V
nA
mV
48
PIN 1
IDENTIFIER
1
A2
Package Information
D
MIN NOM MAX
D1
(mm) (mm) (mm)
A-
- 1.20
E1 E
A1 0.05 - 0.15
A2 0.95 1.00 1.05
b 0.17 0.22 0.27
D - 9.00 -
D1 - 7.00 -
e
A
b A1
e - 0.50 -
E - 9.00 -
E1 - 7.00 -
C8051F206DK Development Kit
General Purpose
Copyright © 2005 by Silicon Laboratories
5.5.2005
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
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