CMPWR330(2011) 查看數據表（PDF） - ON Semiconductor
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CMPWR330 Datasheet PDF : 10 Pages
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CMPWR330
PERFORMANCE INFORMATION (Cont’d)
CMPWR330 Typical Thermal Characteristics
The overall junction to ambient thermal resistance (qJA)
for device power dissipation (PD) consists primarily of two
paths in series. The first path is the junction to the case (qJC)
which is defined by the package style, and the second path
is case to ambient (qCA) thermal resistance which is
dependent on board layout. The final operating junction
temperature for any set of conditions can be estimated by the
following thermal equation:
TJ + TA ) (PD)(qJC) ) (PD)(qCA)
+ TA ) (PD)(qJA)
The CMPWR330 uses a thermally enhanced package
where all the GND leads (pins 5 through 8) are integral to the
leadframe. When this package is mounted on a double−sided
printed circuit board with two square inches of copper
allocated for “heat spreading”, the resulting qJA is about
50°C/W.
Based on a typical operating power dissipation of 0.7 W
(1.75 V x 0.4 A) with an ambient of 70°C, the resulting
junction temperature will be:
TJ + TA ) (PD)(qJA)
+ 70° C ) 0.7 W (50° CńW)
+ 70° C ) 35° C + 105° C
The thermal characteristics were measured using
a double−sided board with two square inches of copper area
connected to the GND pin for “heat spreading”.
Measurements showing performance up to junction
temperature of 125°C were performed under light load
conditions (5 mA). This allows the ambient temperature to
be representative of the internal junction temperature.
NOTE:
The use of multi−layer board construction with
separate ground and power planes will further
enhance the overall thermal performance. In the
event of no copper area being dedicated for heat
spreading, a multi−layer board construction,
using only the minimum size pad layout, will
provide the CMPWR330 with an overall qJA of
70°C/W which allows up to 780 mW to be
safely dissipated for the maximum junction
temperature.
Figure 23. VOUT Variation with TAMB(400 mA Load)T
Figure 24. Select/Deselect Threshold
Variation with TJUNC
Figure 25. VAUX Switch Resistance vs. TAMB
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