CMX602A 查看數據表（PDF） - CML Microsystems Plc

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CMX602A

Calling Line Identifier plus Call Waiting (Type II)

CML Microsystems Plc 

Calling Line Identifier

CMX602A

1.3 Signal List

Packages

D4 / P3

Signal

Description

Pin No.

1

2

3

Name

XTALN

XTAL

RD

4

RT

5

AOP

6

INV

7

NINV

8

VSS

9

VBIAS

10

MODE

11

ZP

Type

O/P

I/P

I/P (S)

BI

BI

I/P

I/P

Power

O/P

I/P (S)

I/P (S)

The output of the on-chip Xtal oscillator inverter.

The input to the on-chip Xtal oscillator inverter.

Input to the Ring or Line Polarity Reversal

Detector.

Open-drain output and Schmitt trigger input

forming part of the Ring or Line Polarity Reversal

detector. An external resistor to VDD and a

capacitor to VSS should be connected to RT to

filter and extend the RD input signal.

The output of the on-chip Input Signal Amplifier

and the input to the Bandpass Filter.

The inverting input to the on-chip Input Signal

Amplifier.

The non-inverting input to the on-chip Input

Signal Amplifier.

Negative supply rail (signal ground).

Internally generated bias voltage, held at VDD/2

when the device is not in 'Zero-Power' mode.

Should be decoupled to VSS by a capacitor

mounted close to the device pins.

Input used to select the operating mode. See

section 1.5.1.

A high level on this input selects 'Zero-Power'

mode, a low level enables the VBIAS supply, the

Input Signal Amplifier, the Bandpass Filter and

either the FSK or the Tone Alert circuits

depending on the MODE input.

© 1998 Consumer Microcircuits Limited

4

D/602A/4

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