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PSD834F2-10J 查看數據表(PDF) - STMicroelectronics

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PSD834F2-10J Datasheet PDF : 95 Pages
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PSD834F2V
SUMMARY DESCRIPTION
The PSD family of memory systems for microcon- – First-time In-System Programming (ISP)
trollers (MCUs) brings In-System-Programmability
(ISP) to Flash memory and programmable logic.
The result is a simple and flexible solution for em-
bedded designs. PSD devices combine many of
– Complex address decoding
– Simulataneous READ and WRITE to the
device.
the peripheral functions found in MCU based ap- The JTAG Serial Interface block allows In-System
plications.
Programming (ISP), and eliminates the need for
The CPLD in the PSD devices features an opti-
mized macrocell logic architecture. The PSD mac-
rocell was created to address the unique
requirements of embedded system designs. It al-
lows direct connection between the system ad-
dress/data bus, and the internal PSD registers, to
simplify communication between the MCU and
an external Boot EPROM, or an external program-
mer. To simplify Flash memory updates, program
execution is performed from a secondary Flash
memory while the primary Flash memory is being
updated. This solution avoids the complicated
hardware and software overhead necessary to im-
plement IAP.
other supporting devices.
ST makes available a software development tool,
The PSD device includes a JTAG Serial Program-
ming interface, to allow In-System Programming
(ISP) of the entire device. This feature reduces de-
velopment time, simplifies the manufacturing flow,
t(s) and dramatically lowers the cost of field upgrades.
Using ST’s special Fast-JTAG programming, a de-
c sign can be rapidly programmed into the PSD in as
u little as seven seconds.
d The innovative PSD family solves key problems
ro faced by designers when managing discrete Flash
Obsolete Product(s) - Obsolete P memory devices, such as:
PSDsoft Express, that generates ANSI-C compli-
ant code for use with your target MCU. This code
allows you to manipulate the non-volatile memory
(NVM) within the PSD. Code examples are also
provided for:
– Flash memory IAP via the UART of the host
MCU
– Memory paging to execute code across several
PSD memory pages
– Loading, reading, and manipulation of PSD
macrocells by the MCU.
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