HCPL-0710-060E 查看數據表（PDF） - Avago Technologies
零件编号
产品描述 (功能)
生产厂家
HCPL-0710-060E Datasheet PDF : 17 Pages
| |||
Electrical Specifications
Test conditions that are not specified can be anywhere within the recommended operating range.
All typical specifications are at TA = +25 °C, VDD1 = VDD2 = +5 V.
DC Specifications
Parameter
Symbol
Min.
Typ. Max. Units
Logic Low Input
Supply Current [1]
IDD1L
6.0 10.0 mA
Logic High Input
Supply Current
IDD1H
1.5
3.0
mA
Input Supply Current
IDD1 13.0 mA
Output Supply Current
IDD2
5.5 11.0 mA
Input Current
II
-10 10
µA
Logic High Output
VOH
Voltage
4.4
5.0 V
4.0
4.8
Logic Low Output
VOL
0
0.1 V
Voltage 0.5 1.0
Test Conditions
VI = 0 V
VI = VDDI
IO = -20 µA, VI = VIH
IO = -4 mA, VI = VIH
IO = -20 µA, VI = VIL
IO = -4 mA, VI = VIL
Switching Specifications
Parameter
Symbol
Min.
Typ. Max. Units
Propagation Delay Time
tPHL
20
40
ns
to Logic Low Output [2]
Propagation Delay Time
tPLH
23
40
ns
to Logic High Output
Pulse Width [3]
PW
80 ns
Data Rate [3] 12.5 MBd
Pulse Width Distortion [4]
PWD 3
8
ns
|tPHL - tPLH|
Propagation Delay Skew [5]
tPSK 20
ns
Output Rise Time
tR 9 ns
(10 - 90%)
Output Fall Time
tF 8 ns
(90 - 10%)
Common Mode
|CMH|
10
20 kV/µs
Transient Immunity at
Logic High Output [6]
Common Mode
|CML|
10
20 kV/µs
Transient Immunity at
Logic Low Output [6]
Input Dynamic Power
Dissipation Capacitance [7]
CPD1 60 pF
Output Dynamic Power
Dissipation Capacitance [7]
CPD2 10 pF
Test Conditions
CL = 15 pF
CMOS Signal Levels
CL = 15 pF
CMOS Signal Levels
CL = 15 pF
CMOS Signal Levels
CL = 15 pF
CMOS Signal Levels
CL = 15 pF
CMOS Signal Levels
CL = 15 pF
CL = 15 pF
CMOS Signal Levels
CL = 15 pF
CMOS Signal Levels
VI = VDD1,
VO > 0.8 VDD1,
VCM = 1000 V
VI = 0 V, VO > 0.8 V,
VCM = 1000 V
7
Share Link: 