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HD74BC240AP 查看數據表(PDF) - Renesas Electronics

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产品描述 (功能)
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HD74BC240AP
Renesas
Renesas Electronics Renesas
HD74BC240AP Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HD74BC240A
Octal Buffers/Line Drivers With 3 State Outputs
REJ03D0280–0300Z
(Previous ADE-205-006A (Z))
Rev.3.00
Jul.16.2004
Description
The HD74BC240A provides high drivability and operation equal to or better than high speed bipolar standard logic IC
by using Bi-CMOS process. The device features low power dissipation that is about 1/5 of high speed bipolar logic IC,
when the frequency is 10 MHz. The device has eight inverter drivers with three state outputs in a 20 pin package. This
device is a non inverting buffer and has two active low enables (1G and 2G). Each enable independently controls 4
buffers.
Features
Input/Output are at high impedance state when power supply is off.
Built in input pull up circuit can make input pins be open, when not used.
TTL level input
Wide operating temperature range
Ta = –40 to + 85°C
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
HD74BC240AP
DILP-20 pin
DP-20N, -20NEV P
HD74BC240AFPEL
SOP-20 pin (JEITA) FP-20DAV
FP
HD74BC240ATELL
TSSOP-20 pin
TTP-20DAV
T
Note: Please consults the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
G
A
Output Y
H
X
Z
L
H
L
L
L
H
H : High level
L : Low level
X : Immaterial
Z : High impedance
Rev.3.00, Jul.16.2004, page 1 of 8

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