HD74LV10AT 查看數據表（PDF） - Renesas Electronics

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HD74LV10AT

Triple 3-input Positive NAND Gates

Renesas Electronics 

HD74LV10A

Triple 3-input Positive NAND Gates

REJ03D0233–0300Z

(Previous ADE-205-251A (Z))

Rev.3.00

May 24, 2004

Description

The HD74LV10A performs the Boolean functions Y = A•B•C or Y = A+B+C in positive logic.

Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the

low-power consumption extends the battery life.

Features

• VCC = 2.0 V to 5.5 V operation

• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)

• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)

• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)

• Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

HD74LV10AFPEL

SOP–14 pin(JEITA) FP–14DAV

FP

HD74LV10ARPEL

SOP–14 pin(JEDEC) FP–14DNV

RP

HD74LV10ATELL

TSSOP–14 pin

TTP–14DV

T

Note: Please consult the sales office for the above package availability.

Taping Abbreviation

(Quantity)

EL (2,000 pcs/reel)

EL (2,500 pcs/reel)

ELL (2,000 pcs/reel)

Function Table

Inputs

A

B

C

Output Y

H

H

H

L

L

X

X

H

X

L

X

H

X

X

L

H

Note: H: High level

L: Low level

X: Immaterial

Rev.3.00, May 24, 2004, page 1 of 1

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