HD74LVC125AFPEL 查看數據表（PDF） - Renesas Electronics

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HD74LVC125AFPEL

Quad. Bus Buffer Gates with 3-state Outputs

Renesas Electronics 

HD74LVC125A

Pin Arrangement

1C 1

1A 2

1Y 3

2C 4

2A 5

2Y 6

GND 7

(Top view)

14 VCC

13 4C

12 4A

11 4Y

10 3C

9 3A

8 3Y

Absolute Maximum Ratings

Item

Symbol Ratings

Unit

Conditions

Supply voltage

Input diode current

Input voltage

Output diode current

Output voltage

Output current

VCC, GND current / pin

Storage temperature

VCC

IIK

VI

IOK

VO

IO

ICC or IGND

Tstg

–0.5 to 6.0

–50

–0.5 to 6.0

–50

50

–0.5 to VCC +0.5

–0.5 to 6.0

±50

±100

–65 to +150

V

mA

VI = –0.5 V

V

mA

VO = –0.5 V

VO = VCC +0.5 V

V

Output "H" or "L"

Output "Z" or VCC:OFF

mA

mA

°C

Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of

which may be realized at the same time.

Rev.4.00 Jul. 23, 2004 page 2 of 6

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