HI-8050 查看數據表（PDF） - Holt Integrated Circuits

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HI-8050

CMOS High Voltage Display Driver

Holt Integrated Circuits 

HI-8050/51, HI-8150/51

FUNCTIONAL DESCRIPTION

INPUT LOGIC

DOUT

The data is clocked into a serial shift register from the DIN in-

put on the negative edge of CL while CS is held low. LD is

normally held low and pulsed high only when data from the

shift register is parallel latched to the segment outputs. CS

must be low when LD is pulsed. The latches are transparent

while LD is high. A logic "1" in the shift register causes the

corresponding segment output to be out of phase with the

BP output. All four logic inputs are TTL compatible on the

HI-8050/51and CMOS compatible on the HI-8150/51.

BPOSC and BPIN

The user has the option of creating the backplane frequency

internally or providing a signal from an external source. For

an internal oscillator, BPIN and BPOSC are connected to-

gether and the appropriate R & C combination is applied as

shown in Figure 1. The resulting backplane frequency is ap-

proximately:

fBP = 1

. (R = 220KW, C = 220pF, fBP » 100HZ)

256 RC

The value of the resistor must be greater than 30KW.

The DOUT30, DOUT32, and DOUT38 pins are available for

cascading devices to drive more segments (See Figure 3) and

for verifying the integrity of the shift register data. The outputs

can drive 2 TTL loads. They change on the positive edge of

CL.

AUTOMATIC SEGMENTS OFF

A threshold device detects when the 5V supply is below ap-

proximately 1V and forces all the segments and the backplane

to the same level. This feature is used to discharge the VEE

capacitor when the 5V power is switched off, to prolong the life

of the LCD display.

8020OPT

The CL and CS inputs function the same as the HI-8010 and

HI-8110 product (See Figure 5) if this pin is left open or held

high. If held low, the two pins function the same as the HI-8020

and HI-8120 product (See Figure 6). This input is available

only on the HI-8050 (TTL) and HI-8150 (CMOS) products.

Alternatively, BPOSC is left open and an external backplane

signal of the desired frequency is applied to the BPIN input.

VEE & NEGATIVE VOLTAGE CONVERTER

VEE can be connected to a negative power supply. Alterna-

tively, the HI-8050 & HI-8150 have the option of generating

the VEE voltage with a built-in -25 volt negative voltage con-

verter (See Figure 2). When not used, the open CONVOSC

pin is detected and all power consuming circuitry is dis-

abled. The converter will survive a short between two seg-

ments and still maintain a VEE voltage of -20V.

TEST INPUTS

The test functions available are:

T2

T1 Display Mode

0

0

Normal

0

1

All Off

1

0

All On

1

1

Alternating On/Off Segments

The test inputs must be tied to the appropriate logic level for

correct circuit operation. Both test inputs are TTL compatible

on the HI-8050/51 and CMOS compatible on the HI-8150/51.

VDD

R

BPIN

CR

÷ 256

Q

BPOSC

C

VSS

TO BACKPLANE

TRANSLATOR

AND DRIVER

Figure 1. INTERNAL OSCILLATOR CIRCUIT

VDD

68KW

CONVOSC

OSC

RSENSE

IN5818, IN5819

Control

CONVOUT

VDD

330µH

VSS

VEE

10µF

VSS

Figure 2. OPTIONAL VOLTAGE CONVERTER

HOLT INTEGRATED CIRCUITS

3

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