Q67100-Q2039 查看數據表（PDF） - Siemens AG

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Q67100-Q2039

4M x 1-Bit Dynamic RAM Low Power 4M x 1-Bit Dynamic RAM

Siemens AG 

HYB 314100BJ/BJL-50/-60/-70

3.3V 4M x 1 DRAM

AC Characteristics (cont’d) 5)6)

TA = 0 to 70 ˚C, VCC = 3.3 V ± 0.3 V, tT = 5 ns

Parameter

Symbol

Limit Values

Unit Note

-50

-60

-70

min. max. min. max. min. max.

Output buffer turn-off delay

tOFF

0

13 0

15 0

20 ns 12

Write Cycle

Write command hold time

tWCH

8

–

Write command pulse width

tWP

8

–

Write command setup time

tWCS

0

–

Write command to RAS lead time tRWL 13 –

Write command to CAS lead time tCWL 13 –

Data setup time

tDS

0

–

Data hold time

tDH

10 –

10 –

10 –

0

–

15 –

15 –

0

–

10 –

10 –

10 –

0

–

20 –

20 –

0

–

15 –

ns

ns

ns 13

ns

ns

ns 14

ns 14

Read-Modify-Write Cycle

Read-write cycle time

RAS to WE delay time

CAS to WE delay time

Column address to WE delay

time

tRWC

tRWD

tCWD

tAWD

115 –

50 –

13 –

25 –

130 –

60 –

15 –

30 –

155 –

70 –

20 –

35 –

ns

ns 13

ns 13

ns 13

Fast Page Mode Cycle

Fast page mode cycle time

CAS precharge time

Access time from CAS

precharge

RAS pulse width

CAS precharge to RAS Delay

tPC

35

tCP

10

tCPA

–

tRAS

50

tRHCP 30

–

40

–

10

30 –

200 k 60

–

35

–

45

–

10

35 –

200 k 70

–

40

–

ns

–

ns

40 ns 7

200 k ns

–

ns

Semiconductor Group

8

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