HYB314265BJ-45 查看數據表（PDF） - Siemens AG

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HYB314265BJ-45

256K x 16-Bit EDO-Dynamic RAM

Siemens AG 

HYB 5(3)14265BJ(L)-400/-40/-45/-50

256K x 16 EDO-DRAM

Parameter

Symbol Limit Values

min.

max.

Average VCC supply current during

RAS-only refresh cycles:

ICC3

–

-45 version

105

-50 version

95

Unit Test

Condition

mA 2, 4

Average VCC supply current during hyper page ICC4

–

mode (EDO) operation:

-45 version

-50 version

Standby VCC supply current

(RAS = LCAS = UCAS = WE = VCC – 0.2 V)

ICC5

–

Standby VCC supply current (L-version only) ICC5

–

(RAS = LCAS = UCAS = WE = VCC – 0.2 V)

Average VCC supply current during CAS-

–

before-RAS refresh mode:

ICC6

-45 version

-50 version

Self Refresh Current (L-version only)

ICC7

–

CBR cycle with RAS >trasss(min), CAS held low;

WE = VCC – 0.2 V,

Addresses and Din = VCC – 0.2 V or 0.2 V

mA 2, 3, 4

75

65

1

mA 1

200

µA 1

mA 2, 4

105

95

250

µA

Capacitance

TA = 0 to 70 °C; f = 1 MHz

Parameter

Symbol

Limit Values

Unit

min.

max.

Input capacitance (A0 to A8)

CI1

–

5

pF

Input capacitance (RAS, UCAS, LCAS, WE, OE) CI2

–

7

pF

Output capacitance (l/O1 to l/O16)

CIO

–

7

pF

Semiconductor Group

7

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