HYM72V8010GS-60 查看數據表（PDF） - Siemens AG
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HYM72V8010GS-60 Datasheet PDF : 11 Pages
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HYM72V8000/10GS-50/-60
8M x 72-ECC Module
The HYM 72V8000/10GS-50/-60 is a 64 MByte DRAM module organized as 8 388 608 words by 72-
bit in a 168-pin, dual read-out, single-in-line package comprising five HYB 3165800J/T 8M × 8
DRAMs in 500 mil wide SOJ or TSOPII - packages mounted together with nine 0.2 µF ceramic
decoupling capacitors on a PC board. All inputs except RAS and DQ are buffered by using four
BiCMOS 8-bit buffers/line drivers.
Each HYB 3165800J/T is described in the data sheet and is fully electrically tested and processed
according to Siemens standard quality procedure prior to module assembly. After assembly onto
the board, a further set of electrical tests is performed.
The density and speed of the module can be detected by the use of presence detect pins.
Ordering Information
Type
Ordering Code
HYM 72V8000GS-50 Q67100-Q2085
HYM 72V8000GS-60 Q67100-Q2086
HYM 72V8010GS-50
HYM 72V8010GS-60
Package
L-DIM-168-4
L-DIM-168-4
L-DIM-168-4
L-DIM-168-4
Descriptions
DRAM module (access time 50 ns)
DRAM module (access time 60 ns)
DRAM module (access time 50 ns)
DRAM module (access time 60 ns)
Pin Names
A0-A12,B0
A0-A11,B0
DQ0 - DQ71
RAS0, RAS2
CAS0 , CAS2
WE0, WE2
OE0, OE2
Vcc
Vss
PD1 - PD8
PDE
ID0 , ID1
N.C.
Row Address Inputs
Column Address Inputs
Data Input/Output
Row Address Strobe
Column Address Strobe
Read / Write Input
Output Enable
Power (+3.3 Volt)
Ground
Presence Detect Pins
Presence Detect Enable
ID indentification bit
No Connection
Presence-Detect and ID-pin Truth Table:
Module
HYM 728000GS-50
HYM 728000GS-60
ID0 ID1 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8
Vss Vss 1
0
1
1
0
0
0
0
Vss Vss 1
0
1
1
0
1
1
0
Note: 1 = High Level ( Driver Output) , 0 = Low Level (Driver Output) for PDE active ( ground) . For PDE at a high
level all PD terminal are in tri-state.
Semiconductor Group
2
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