IW4017B 查看數據表（PDF） - Estek Electronics Co. Ltd
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IW4017B Datasheet PDF : 6 Pages
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IW4017B
Description
The IW4017B is 5 –stageJohnson counter having 10 decode outputs. Inputs include a CLOCK, a
RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse
shaping that allows unlimited clock input pulse rise and fall times.
The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBITsignal is
low. Counter advancement via the clock line isinhibited when the CLOCK INHIBIT signal is high. A high
RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-
speed operation, 2- input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus
assuring proper counting sequence. The decoded Outputs are normally low and go high only at their
respective decoded time slot. Each decoded output remains high for one full clock cycle. A
Signal completes one cycle every 10 clock input cycles.
C ARR Y-
OUT
Features
Operating Voltage Range: 3.0 to 18 V
Pin Assignment
Maximum input current of 1 at 18 V over full package-
Autemperature range ;100 nA at 18 V and 25 C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
Logic Diagram
16
DIP - 16
16
SOP - 16
Package
Function Table
Clock
L
X
X
Clock
Enable
X
H
X
L
Reset
L
L
H
L
Output State
no change
no change
reset counter
Q0=H, Q1-Q9=L,
C0=H
Advance to next
state
X
L no change
X
L no change
PIN 16 = VCC
PIN 8 =
GND
H
L Advance to next
state
Carry Out=H for Q0 ,Q1,Q2,Q3 or Q4=H
Carry Out = L otherwise, X = don ' t care
BEIJING ESTEK ELECTRONICS CO.,LTD
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