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LT1001CN8 查看數據表(PDF) - Linear Dimensions Semiconductor

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LT1001CN8
LINEAR_DIMENSIONS
Linear Dimensions Semiconductor LINEAR_DIMENSIONS
LT1001CN8 Datasheet PDF : 16 Pages
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LT1001
APPLICATIONS INFORMATION
Offset Voltage Adjustment
The input offset voltage of the LT1001, and its drift with
temperature, are permanently trimmed at wafer test to a
low level. However, if further adjustment of Vos is neces-
sary, nulling with a 10k or 20k potentiometer will not
degrade drift with temperature. Trimming to a value other
than zero creates a drift of (Vos/300)µV/°C, e.g., if Vos is
Improved Sensitivity Adjustment
7.5k
1k
+15V
1 7.5k
2
8
INPUT
LT1001
3+
7
OUTPUT
6
4
–15V
1001 F02
adjusted to 300 µV, the change in drift will be 1 µV/°C. The
adjustment range with a 10k or 20k pot is approximately
±2.5mV. If less adjustment range is needed, the sensitivity
and resolution of the nulling can be improved by using a
smaller pot in conjunction with fixed resistors. The ex-
ample below has an approximate null range of ±100 µV.
0.1Hz to 10Hz Noise Test Circuit
0.1µF
100k
10
LT1001
+
DEVICE
UNDER
TEST
VOLTAGE GAIN = 50,000
(PEAK-TO-PEAK NOISE MEASURED IN 10 SEC INTERVAL)
2k
4.7 µF
+
LT1001
100k
24.3k
0.1 µF
4.3k
2.2µF
22µF
SCOPE
×1
RIN = 1M
110k
1001 F03
The device under test should be warmed up for three
minutes and shielded from air currents.
2.2µF
TANTALUM
RIN
1k
10k
INPUT
15pF
DC Stabilized 1000v/µsec Op Amp
3.9k
300
2N5486
1N914
0.01µF
1k
30k
–15V
3+
6
LT1001
2
30k
200* 200pF
2N5160
33
1.8k
2N3866
0.001µF
470
390
2N3904
2N3904
0.01µF
22
2N3866
2N5160 2N3906
0.1µF
+15V
22µF TANTALUM
2N4440
0.5
0.5
2N4440
OUTPUT
15-60pF
TUSONIX # 519-3188
3.9k
1N914
1k
Rf
200pF
300
200*
FULL POWER
BANDWIDTH 8MHz
22µF TANTALUM
1.2k
0.1µF
–15V
*ADJUST FOR
BEST SQUARE WAVE
AT OUTPUT
1001 F04
1001fb
7

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