M32171F3 查看數據表（PDF） - Renesas Electronics
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M32171F3 Datasheet PDF : 772 Pages
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REVISION HISTORY
32171 Group User’s Manual
Rev. Date
Page
2.00 Sep 19, 2003 P12-3
P12-14
P12-24
P12-34
P12-42
P12-46
P12-53
P12-60
P13-9
P13-77
P15-16
P17-4
P17-6
P18-5
P19-13
P19-14
P21-5,
P21-7
P21-9
P21-11
P21-18
P21-19
P21-23
P21-25
P21-26
P21-27
P22-2
Description
Summary
Baud rate for UART mode in Table 12.1.1 changed
Before:
156K bits/sec
After:
1.25M bits/sec
Note in Section 12.2.3. (1) corrected
Last paragraph of Section 12.2.8 changed
Figure 12.4.1 corrected
Note deleted
Figure 12.6.3 corrected
Note deleted
Figure 12.7.1 corrected
Note deleted
Description in “Setting of Baud Rate (BRG) Regiser” partly deleted
Notes and Explanation added for 13.2.1. (4), “RFST (Forcible Reset) bit”
Figure 13.7.3 altered
Figure 5.4.3 corrected
Note 4 for Figure 17.2.3 corrected
Note 2 for Figure 17.3.2 altered
Figure 18.2.1 altered
TAP states for (2) continuous access to the same datagister in Figure 19.4.5 corrected
Note in Section 19.5 altered
Note 3 changed
Figures of ICCI-3V temperature characteristics newly added
Descriptions of IIAN in the tables, Section 21.1.4 addedd
(2) Electrical characteristics of each power supply pin when f(XIN)=10 MHz corrected to
(4) Electrical characteristics of each power supply pin when f(XIN)= 8 MHz
“A-D conversion characteristics (Referenced to AVCC=VREF=VCCE=3.3V, Ta=25°C,
f(XIN) = 8.0 MHz Unless Otherwise Noted)” corrected to “A-D conversion characteristics
(Referenced to AVCC=VREF=VCCE=3.3V, Ta = -40 to 85°C, f(XIN) = 8.0 MHz Unless
Otherwise Noted)”
Descriptions of IIAN in the tables, Section 21.2.4 added
Maximum rated value for td(RTDCLKH-RTDRXD) corrected
“tv(BCLKL-BHWL)” corrected to “td(BCLKL-D)”
Parameter, “Byte enable delay time after write” corrected to “Valid Byte enable timer after write”
Figure 21.3.1 altered
Normal mode added to (1) Test conditions
(7/8)
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