M5M51016BRT 查看數據表（PDF） - Mitsumi
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M5M51016BRT Datasheet PDF : 7 Pages
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(4) TIMING DIAGRAMS
Read cycle
A0~15
BC1 and/or BC2
CS
(Note 3)
(Note 3)
OE
DQ1~16
(Note 3)
W = "H" level
9 Jul ,1997
MITSUBISHI LSIs
M5M51016BTP,RT-10VL-I,
-10VLL-I
1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM
tCR
ta(A)
ta (BC1) or
ta (BC2)
ta (CS)
ta (OE)
ten (OE)
ten (BC1)
ten (BC2)
ten (CS)
tv (A)
tdis (BC1) or
tdis (BC2)
tdis (CS)
tdis (OE)
DATA VALID
(Note 3)
(Note 3)
(Note 3)
Write cycle (W control mode)
tCW
A0~15
BC1 and/or BC2
CS
OE
W
DQ1~16
(Note 3)
(Note 3)
tsu (BC1) or tsu (BC2)
tsu (CS)
tsu (A-WH)
tsu (A)
tw (W)
trec (W)
tdis (OE)
tdis (W)
ten (W)
ten(OE)
DATA IN
STABLE
tsu (D)
th (D)
MITSUBISHI
ELECTRIC
(Note 3)
(Note 3)
5
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