M66220 查看數據表（PDF） - Mitsumi

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M66220

256 × 8-BIT MAIL-BOX

Mitsumi 

MITSUBISHI 〈DIGITAL ASSP〉

M66220SP/FP

Contention Read Cycle (WE = VIH, OE = VIL)

Contention read cycle No.1 (Address control) See Notes 10 and 11.

Address A

(Address B)

∗ Address matching

tAPS

Address B

(Address A)

∗

tNAA

Not Ready B

(Not Ready A)

I/O0B~I/O7B

(I/O0A~I/O7A)

tv(A)

Previous cycle data

∗ Address A = Address B

256 × 8-BIT MAIL-BOX

Address not matching

tNDA

tNO

Data output determined

ta(A)

Contention read cycle No.2 (CS control) See Notes 10 and 12.

Addresses

A&B

∗ Address matching

CSA

(CSB)

CSB

(CSA)

Not Ready B

(Not Ready A)

I/O0B~I/O7B

(I/O0A~I/O7A)

tAPS

tNAC

tNDC

ten(CS)

∗ Address A = Address B

ta(CS)

Notes 10: The Not Ready output of the first-in port holds “H”.

11: When CS is set to “L” before the address input is determined.

12: When the address input is determined before CS transition to “L”.

tNO

Data output determined

9

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