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M66258FP 查看數據表(PDF) - Renesas Electronics

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M66258FP
Renesas
Renesas Electronics Renesas
M66258FP Datasheet PDF : 14 Pages
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M66258FP
8192 × 8-Bit Line Memory
REJ03F0252-0200
Rev.2.00
Sep 14, 2007
Description
The M66258FP is high speed line memory that uses high performance silicon gate CMOS process technology and
adopts the FIFO (First In First Out) structure consisting of 8192 words × 8 bits.
The M66258FP, performing reading and writing operations at different cycles independently and asynchronously, is
optimal for buffer memory to be used between equipment of different data processing speeds.
Features
Memory configuration:
8192 words × 8 bits configuration
High speed cycle:
20 ns (Min)
High speed access:
16 ns (Max)
Output hold:
3 ns (Min)
Reading and writing operations can be completely carried out independently and asynchronously
Variable length delay bit
Input/output:
TTL direct connection allowable
Output:
3 states
Application
Digital copying machine, laser beam printer, high speed facsimile, etc.
Block Diagram
Data inputs
D0 to D7
13 14 15 16 21 22 23 24
Data outputs
Q0 to Q7
1 2 3 4 9 10 11 12
Input buffer
Output buffer
WE 20
Write
enable input
WRES 19
Write
reset input
WCK 17
Write
clock input
VCC 18
Memory array
8192 × 8 bits
5 RE
Read
enable input
6 RRES
Read
reset input
8 RCK
Read
clock input
7 GND
REJ03F0252-0200 Rev.2.00 Sep 14, 2007
Page 1 of 13

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