MCP6S21 查看數據表（PDF） - Microchip Technology

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MCP6S21

Single-Ended, Rail-to-Rail I/O, Low Gain PGA

Microchip Technology 

MCP6S21/2/6/8

1.1.4

DIFFERENT VREF CONDITIONS

Some of the plots in Section 2.0, “Typical Performance

Curves”, have the conditions VREF = VDD/2 or

VREF = VDD. The equations and figures above are eas-

ily modified for these conditions. The ideal VOUT

becomes:

EQUATION

VO_ideal = VREF + G (VIN – VRE F)

VDD ≥ VREF > VSS = 0V

The complete linear model is:

EQUATION

VO_linear = G(1 + gE)(VIN – VIN_L + VOS ) + 0.3V

where the new VIN endpoints are:

EQUATION

VIN_L

=

-0--.--3---V-----–-----V----R---E---F--

G + VREF

VIN_R

=

V----D----D-----–----0---.--3---V-----–-----V----R---E---F--

G + VREF

The equations for extracting the specifications do not

change.

DS21117A-page 8

 2003 Microchip Technology Inc.

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