MT8888CSR 查看數據表（PDF） - Zarlink Semiconductor Inc

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MT8888CSR

Integrated DTMF Transceiver with Intel Micro Interface

Zarlink Semiconductor Inc 

MT8888C

Data Sheet

receiver will tolerate signal interruptions (drop out) too short to be considered a valid pause. This facility, together

with the capability of selecting the steering time constants externally, allows the designer to tailor performance to

meet a wide variety of system requirements.

VDD

MT8888C

VDD

St/GT

ESt

C1

Vc

R1

tGTA = (R1C1) In (VDD / VTSt)

tGTP = (R1C1) In [VDD / (VDD-VTSt)]

Figure 5 - Basic Steering Circuit

5.0 Guard Time Adjustment

The simple steering circuit shown in Figure 5 is adequate for most applications. Component values are chosen

according to the following inequalities (see Figure 7):

tREC ≥ tDPmax+tGTPmax - tDAmin

tREC ≤ tDPmin+tGTPmin - tDAmax

tID ≥ tDAmax+tGTAmax - tDPmin

tDO ≤ tDAmin+tGTAmin - tDPmax

6

Zarlink Semiconductor Inc.

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