MX25L12845EZNI 查看數據表（PDF） - Macronix International
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MX25L12845EZNI
Macronix International
MX25L12845EZNI Datasheet PDF : 74 Pages
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MX25L12845E
Figure 22. 4 x I/O Read Enhance Performance Mode Sequence (Command EB)........................................... 54
Figure 23. Fast Quad I/O DT Read (4DTRD) Sequence (Command ED)......................................................... 55
Figure 24. Fast Quad I/O DT Read (4DTRD) Enhance Performance Sequence (Command ED).................... 55
Figure 25. Sector Erase (SE) Sequence (Command 20)................................................................................. 56
Figure 26. Block Erase (BE/BE32K) Sequence (Command D8/52)................................................................. 56
Figure 27. Chip Erase (CE) Sequence (Command 60 or C7).......................................................................... 56
Figure 28. Page Program (PP) Sequence (Command 02).............................................................................. 57
Figure 29. 4 x I/O Page Program (4PP) Sequence (Command 38)................................................................. 57
Figure 30. Continously Program (CP) Mode Sequence with Hardware Detection (Command AD).................. 58
Figure 31-1. Enter Parallel Mode (ENPLM) Sequence (Command 55)........................................................... 59
Figure 31-2. Exit Parallel Mode (EXPLM) Sequence (Command 45).............................................................. 59
Figure 31-3. Parallel Mode Read Identification (Parallel RDID) Sequence (Command 9F)............................ 59
Figure 31-4. Parallel Mode Read Electronic Manufacturer & Device ID (Parallel REMS) Sequence (Command
90)..................................................................................................................................................................... 60
Figure 31-5. Parallel Mode Release from Deep Power-down (RDP) and Read Electronic Signature (RES)
Sequence.......................................................................................................................................................... 60
Figure 31-6. Parallel Mode Read Array (Parallel READ) Sequence (Command 03)....................................... 61
Figure 31-7. Parallel Mode Page Program (Parallel PP) Sequence (Command 02)....................................... 61
Figure 32. Deep Power-down (DP) Sequence (Command B9)....................................................................... 61
Figure 33. Read Electronic Signature (RES) Sequence (Command AB)......................................................... 62
Figure 34. Release from Deep Power-down (RDP) Sequence (Command AB).............................................. 62
Figure 35. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90 or EF or DF or CF)...
63
Figure 36. Write Protection Selection (WPSEL) Sequence (Command 68)..................................................... 63
Figure 37. Single Block Lock/Unlock Protection (SBLK/SBULK) Sequence (Command 36/39)...................... 64
Figure 38. Read Block Protection Lock Status (RDBLOCK) Sequence (Command 3C)................................. 64
Figure 39. Gang Block Lock/Unlock (GBLK/GBULK) Sequence (Command 7E/98)....................................... 64
Figure 40. Power-up Timing.............................................................................................................................. 65
Table 9. Power-Up Timing ................................................................................................................................ 65
INITIAL DELIVERY STATE............................................................................................................................... 65
OPERATING CONDITIONS........................................................................................................................................ 66
Figure 41. AC Timing at Device Power-Up........................................................................................................ 66
Figure 42. Power-Down Sequence................................................................................................................... 67
ERASE AND PROGRAMMING PERFORMANCE..................................................................................................... 68
DATA RETENTION..................................................................................................................................................... 68
LATCH-UP CHARACTERISTICS............................................................................................................................... 68
ORDERING INFORMATION....................................................................................................................................... 69
PART NAME DESCRIPTION...................................................................................................................................... 70
PACKAGE INFORMATION......................................................................................................................................... 71
REVISION HISTORY .................................................................................................................................................. 73
P/N: PM1428
REV. 1.9, SEP. 06, 2013
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