NCP1377BD1R2G 查看數據表（PDF） - ON Semiconductor
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NCP1377BD1R2G Datasheet PDF : 16 Pages
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NCP1377, NCP1377B
60
50
40
30
20
10
0
−25
0
25
50
75
100
125
TEMPERATURE (°C)
Figure 15. DMG Pin Internal Resistance versus
Temperature
APPLICATION INFORMATION
INTRODUCTION
The NCP1377 implements a standard current mode
architecture where the switch−off time is dictated by the
peak current setpoint, whereas the core reset detection
triggers the turn−on event. This component represents the
ideal candidate where low part−count is the key parameter,
particularly in low−cost AC−DC adapters, consumer
electronics, auxiliary supplies, etc. Due to its high−
performance high−voltage technology, the NCP1377
incorporates all the necessary components/features needed
to build a rugged and reliable Switchmode Power Supply
(SMPS):
• Transformer Core Reset Detection: Borderline/critical
operation is ensured whatever the operating conditions
are. As a result, there are virtually no primary switch
turn−on losses and no secondary diode recovery
losses. The converter also stays a first−order system
and accordingly eases the feedback loop design.
• Quasi−Resonant Operation: By delaying the turn−on
event, it is possible to restart the MOSFET in the
minimum of the drain−source wave, ensuring reduced
EMI/video noise perturbations. In nominal power
conditions, the NCP1377 operates in Borderline
Conduction Mode (BCM) also called Critical
Conduction Mode.
• Undervoltage Lockout (UVLO): When Vcc falls below
VCCoff pulses are stopped and the IC consumption
drops down to a few hundred of mA. When Vcc
reaches the latchoff level (5.6 V typical), the startup
current source is activated and brings Vcc back to
Vccon where the IC attempts to startup.
• Overvoltage Protection (OVP): By sampling the
plateau voltage on the demagnetization winding, the
NCP1377 goes into latched fault condition whenever
an overvoltage condition is detected. The controller
stays fully latched in this position until the Vcc is
cycled down to 4.0 V, e.g. when the user unplugs the
power supply from the mains outlet and replugs it.
• External Latch Trip Point: By externally forcing a
level on the OVP greater than the internal setpoint, it
is possible to latchoff the IC, e.g. with a signal coming
from a temperature sensor.
• Adjustable Skip Cycle Level: By offering the ability
to tailor the level at which the skip cycle takes place,
the designer can make sure that the skip operation
only occurs at low peak current. This point guarantees
a noise−free operation with cheap transformer. This
option also offers the ability to fix the maximum
switching frequency when entering light load conditions.
• Overcurrent Protection (OCP): NCP1377 enters burst
mode as soon as the power supply undergoes an
overload which is detected through the sense of the
auxiliary voltage. As detailed above, as soon as Vcc
crosses the undervoltage lockout level (VCCoff in the
electrical table), all pulses are stopped and the device
enters a safe low power operation which prevents from
any lethal thermal runaway. By monitoring the Vcc
level, the startup current source is activated ON and
OFF to create a kind of burst mode where the SMPS
tries to restart. If the fault has gone, the SMPS
resumes operation. On the other hand, if the fault is
still there, the burst sequence starts again.
Startup Sequence
When the power supply is first powered from the mains
outlet, the internal current source (typically 4.0 mA) is
biased and charges up the Vcc capacitor. When the voltage
on this Vcc capacitor reaches the VccON level (typically
12.5 V), the current source turns off and no longer wastes
any power. At this time, the Vcc capacitor only supplies the
controller and the auxiliary supply is supposed to take over
before Vcc collapses below VCCoff. Figure 16 shows the
internal arrangement of this structure.
VccON/VccOFF
+
−
8
HV
IC1 or 0
6
CVCC Aux
4
Figure 16. The Current Source Brings Vcc Above
VccON and Then Turns Off
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