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NJM4151(2003) 查看數據表(PDF) - Japan Radio Corporation

零件编号
产品描述 (功能)
生产厂家
NJM4151
(Rev.:2003)
JRC
Japan Radio Corporation  JRC
NJM4151 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
NJM4151
6. Precision Frequency-to-Voltage Converter
For increased accuracy and linearity, use an operational amplifier integrator as shown in Figure 6, the precision FVC
configuration. Trim the offset to give -10mV out with 10Hz in and trim the full scale adjust for -10V out with 10kHz in. Input
signal conditioning for this circuit is necessary just as for the single supply mode, and scale factor can be programmed by
the choice of component values. A tradeoff exists between output ripple and response time, through the choice of
integration capacitor C1. If C1 = -0.1µF the ripple will be about 100mV. Response time constant tR=RBC1. For RB =
100kand C1 = 0.1µF, tR = 10ms.
PRECAUTIONS
1. The voltage applied to comparator input pins 6 and 7 should not be allowed to go below ground by more than 0.3
volt.
2. Pins 3 and 5 are open-collector outputs. Shorts between these pins and V+ can cause overheating and eventual
destruction.
3. Reference voltage terminal pin 2 is connected to the emitter of an NPN transistor and is held at approximately 1.9
volts. This terminal should be protected from accidental shorts to ground or supply voltages. Permanent damage
may occur if current in pin 2 exceeds 5mA.
4. Avoid stray coupling between NJM4151 pins 5 and 7, which could cause false triggering. For the circuit of Figure 2,
bypass pin 7 to ground with at least 0.01µF. If false triggering is experienced with the precision mode circuits, bypass
pin 6 to ground with at least 0.01µF. This is necessary for operation above 10kHz.
PROGRAMMING THE NJM4151
The NJM4151 can be programmed to operate with a full scale frequency anywhere from 1.0Hz to 100kHz. In the
case of the VFC configuration, nearly any full scale input voltage from 1.0V and up can be tolerated if proper scaling is
employed. Here is how to determine component values for any desired full scale frequency.
1. Set Rs = 14kor use a 12kresistor and 5kpot as shown in the figures. (The only exception to this is Figure 4.)
2. Set T=1.1R0C0 = 0.75 [1 / f0] where f0 is the desired full scale frequency. For optimum performance make 6.8k< R0
< 680kand 0.001µF < C0 < 1.0µF
3. a) For the circuit of Figure 2 make CB = 10-2 [1 / f0] Farads.
Smaller values of CB will give faster response time, but will also increase frequency offset and nonlinearity.
b) For the active integrator circuits make C1 = 5 x 10-5 [1 / f0] Farads. The op-amp integrator must have a slew rate
of at least 135 x 10-6 [1/C1] volts per second where the value of C1 is again give in Frads.
4. a) For the circuits of Figure 2 and 3 keep the values of RB and RB΄ as shown and use an input attenuator to give
the desired full scale input voltage.
b) For the precision mode circuit of Figure 4, set RB = V10/100µA where V10 is the full scale input voltage.
Alternately the op-amp inverting input (summing node) can be used as a current input with full scale input
current I10 = -100µA.
5. For the FVCS, pick the value of CB or C1 to give the optimum tradeoff between response time and output ripple for
the particular application.
DESIGN EXAMPLE
I. Design a precision VFC (from Figure 4) with f0 = 100kHz and V10 = -10V.
1. Set RS = 14.0k.
2. T = 0.75 (1/105)=7.5µsec Let R0 = 6.8kand C0 = 0.001µF
3. C1 = 5 x 1-5 (1/105) = 500pF Op-amp slew rate must be at lease SR=135 x 10-6 (1/500pF)=0.27V/µsec
4. RB = 10V/100µA = 100k
II. Design a precision VFC with f0=1Hz and V10 = -10V.
1. Let RS = 14.0k
2. T = 0.75(1/1) = 0.75sec Let R0 = 680kand C0 = 1.0µF
3. C1 = 5 x 10-5 (1/1) F = 50µF
4. RB = 100k
Ver.2003-12-09
-7-

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