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34063AD 查看數據表(PDF) - System Logic Semiconductor

零件编号
产品描述 (功能)
生产厂家
34063AD
SLS
System Logic Semiconductor SLS
34063AD Datasheet PDF : 2 Pages
1 2
SL34063A
ORDERING INFORMATION
Device Temperature Range Package
34063AD 0° to +70°C
SO-8
34063AP1
Plastic DIP
Pin connection
ELECTRICAL CHARACTERICISTICS
(VCC = 5.0 V, TA= 0 to +70oC unless otherwise specified.)
Characteristics
Symbol Min
OSCILLATOR
Frequency (VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C)
fosc
24
Charge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Ichg
24
Discharge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Idischg
140
Discharge to Charge Current Ratio (Pin7 to Vcc, TA=25°C) Idischg/Ichg 5.2
Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C) Vlpk(sense) 250
OUTPUT SWITCH (Note 3)
Saturation Voltage, Darlington Connection (ISW = 1.0 A,
VCE(sat)
Pins 1, 8 connected)
Saturation Voltage (ISW = 1.0 A, RPin 8 = 82 to VCC. VCE(sat)
Forced β = 20)
DC Current Gain (ISW = 1.0 A, VCE = 5.0 V, TA = 25°C) hFE
50
Collector Off-State Current (VCE = 40V)
IC(off)
COMPARATOR
Threshold Voltage (TA = 25°C)
(TA = TLOW to THIGH)
Vth
1.225
1.21
Threshold Voltage (TA = 25°C) **
Vth
1.2375
Typ
33
33
200
6.2
300
1.0
0.45
120
0.01
1.25
1.25
Threshold Voltage Line Regulation (VCC = 3 0 V to 40 V) Regime
1.4
Input Bias Current (Vin=0V)
IIB
-40
TOTAL DEVICE
Supply Current (VCC = 5 0 V to 40 V, CT = 1 0 nF, Vpin7 = VCC. ICC
2.5
VPin5 > Vth, Pin 2 = Gnd, Remaining pins open)
Max Unit
42
kHz
42
µA
260
µA
7.5
350 mV
1.3
V
0.7
V
100 µA
1.275 V
1.29
1.2625 V
5.0
mV
-400 nA
4.0
mA
NOTES:
1. Maximum package power dissipation limits must be observed.
2.Low duty cycle pulse techniques are used during test to maintain Junction temperature as close to ambient temperature as
possible
3.If the output switch is driven into hard saturation (non Darlington configuration) at low switch currents (< 300 mA) and high
driver currents (>30 mA), it may take up to 2.0 µs to come out of saturation This condition will shorten the off' time at
frequencies > 30 kHz, and is magnified at high temperatures This condition does not occur with a Darlington configuration,
since the output switch cannot saturate If a non Darlington configuration is used, the following output drive condition is
recommended
Forced β of output switch = IC, output/(Ic, driver -7.0 mA*) > 10
*The 100 . resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts
**Possible version for shipment
System Logic
SLS
Semiconductor
2

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